Making Modeling Less Unpleasant


How many times did your mother tell you to take your medicine? You knew two things: a) it would be unpleasant and b) it would be worth the few seconds of unpleasantness because of the benefits it would provide. It appears as if the electronics industry has the same issue with modeling. We talk about the benefits that having a system-level model would have — the ability to explore system archi... » read more

When I Grow Up, I Want To Be A Software Programmer


To keep up with the continuous introduction of new gadgets and capabilities in our smartphones, cars, houses and stores, it is clear that we need more software programmers. That is why multiple companies are coming up with new and innovative ways to introduce people — especially children — to programming. To lure them, the makers of these programming products try to mask the programming asp... » read more

Key Developments In 2013 And Crystal Ball Predictions For 2014


There were a number of key developments in 2013 that stood out for me that I think would of interest to the Semiconductor Engineering audience:  We are now in the world of 8-core processors. Both the new Xbox One and the Sony PS4 sport 8-core AMD CPUs. And MediaTek has announced the MT6592, the first 8-core cell-phone chip that uses ARM A-7 processors running simultaneously at 2GHz. I know... » read more

Blog Review: Dec. 18


Cadence’s Brian Fuller looks back at electronics innovation this past year from the perspective of a 2012 event—with a heavy emphasis on going vertical in both chip architectures, transistors and in business. Things are looking up, sort of. Mentor’s Colin Walls finds social media is getting much more interesting. As proof, he’s joined a discussion about embedded C programming and st... » read more

Accelerating Functional Closure


This paper focuses on practical aspects of the verification process that can help reduce the time taken to reach functional closure. It is based on experiences of working directly with many leading edge semiconductor companies implementing modern verification technologies and methodologies. Since coverage is a measure of how effectively the design is being verified, this paper will address when... » read more

The Week In Review: System-Level Design


A widely quoted report by Bloomberg said ARM might benefit from a major deal with Google, which is considering using ARM cores in its own processor designs. It's impossible to tell at this point whether Google actually will go through with developing its own chips, a move that would have monumental ramifications in multiple areas. For one thing it would give ARM a major entry into the data cent... » read more

Can Intel Dethrone The Foundry Giants?


The leading-edge foundry business isn’t for the faint of heart. It requires deep pockets and sound technology to keep pace in the chip-scaling race. And despite pouring billions of dollars into new fabs and processes, foundries are competing for fewer customers at each node. Given the difficult business conditions, only a handful of vendors can afford to compete in the high-end foundry bus... » read more

Blog Review: Dec. 11


Synopsys’ Brent Gregory has developed a career growth checklist for computer science majors. They should hang this in the hallway at universities. Cadence’s Brian Fuller interviews Saar Drimer, a UK hardware engineer who has been experimenting with odd-shaped PCBs. According to Drimer, 45-degree angles aren’t always optimal. But what happens to all the expensive tools everyone has bee... » read more

The Week In Review: System-Level Design


Synopsys is closing in on the $2 billion mark, which would set a new record in EDA. The company posted strong financial results for its fiscal Q4 and fiscal 2013. For its fiscal year, revenue was $1.962 billion, up 11.7% from $1.756 billion in fiscal 2012. Net income for the year was $247.8 million, up from $182.4 million. For the most recent quarter, revenue was $504.9 million, up from $454.2 ... » read more

New Challenges Emerge With FinFETs


Working at advanced process nodes is always tricky. There are new things to worry about and more rules to deal with initially, yet the promised benefit is improved performance, power and area, or cost. But at the next process node, and the one after that, there are so many variables coming into play that trying to make sense of the PPA equation is becoming much more difficult. Early reports ... » read more

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