tag: Synopsys

FinFET Technology
By Various Writers - 30 May, 2013 - Comments: 0

This white paper discusses the major challenges with FinFETs and how TSMC has been collaborating with Synopsys, one of their ecosystem partners, to deliver a complete solution. Key elements of this solution include comprehensive FinFET profiling without impact to design tool runtime and proven, verified IP availability. The TSMC 16-nm FinFET solution will ensure mutual customers swiftly move to... » read more

3D Brings Test Into Fashion
By Ann Mutschler - 16 May, 2013 - Comments: 0

By Ann Steffora Mutschler As integral and critical as test is to the success of an SoC, it isn’t always one of those topics in semiconductor design that seems fashionable. But as Bassilios Petrakis, director of product marketing for test products at Cadence pointed out, “[Test] is not in fashion, but when we hit one of those brick walls then suddenly we have to think how we are going to... » read more

Cost vs. Value
By Ann Mutschler - 10 May, 2013 - Comments: 0

By Ann Steffora Mutschler The increasing amount of mixed-signal content being included in SoCs for automotive, networking and all manner of mobile devices is reinvigorating the mixed-signal industry. While this is great news for companies playing in anything related to mixed-signal technology, it also means increasing complexity for the engineering teams pulling all the pieces together. “... » read more

What’s Missing In Low-Power Verification
By Ed Sperling - 09 May, 2013 - Comments: 0

By Ed Sperling Ask two engineers what low-power verification is and you’ll likely get the same checklist that includes confidence in the overall design, good coverage, a long list of corner cases, and other items in a checklist. Ask them how to reach that goal you’ll almost certainly get different answers—or maybe no answers at all. Power has emerged as a ubiquitous concern in design,... » read more

Lessons Learned In 4G LTE
By Ann Mutschler - 09 May, 2013 - Comments: 0

By Ann Steffora Mutschler While 4G LTE has moved into the mainstream, there are lessons to be learned about these very complex modems, especially from the perspective of balancing power and performance. The road to mainstream wasn’t exactly smooth sailing. “4G LTE initially got a bad rap for battery life, for power consumption,” said Pete Hardee, low-power design solution marketin... » read more

Shades Of Green
By Ed Sperling - 09 May, 2013 - Comments: 0

By Ann Steffora Mutschler Ask five people in the electronics industry what ‘green’ means and you are sure to get five different answers. In the datacenter, the definition is a little clearer because big iron draws so many amps. But at the SoC level where does the industry stand? The answer is as multifaceted as an SoC itself, with some answers based more on one-upmanship than real met... » read more

Roundtable: Is The Chip Ready
By Ed Sperling - 09 May, 2013 - Comments: 0

Mobile devices demand complex chips—so complex to build that signoff has become something of a balancing act between what the verification teams believe is good enough and time-to market demands. Low-Power/High-Performance Engineering talked about this with Simbal Rafiq, director of engineering at Applied Micro; Robert Hoogenstryd, senior director of marketing for design analysis and signoff ... » read more

Does My Phone Dream?
By Synopsys - 09 May, 2013 - Comments: 0

By Cary Chin Starting with my commentary on the Tesla Model S last month (poor standby time before software update), I was thinking about how common a problem standby power is these days. Nearly all of our recently introduced smartphones have had similar problems (iPhone 5, Nexus 4, Galaxy S4, Lumia 900) running on virtually all operating systems (iOS 6.x, Android 4.2.x, Windows Phone 8). All ... » read more

Experts At The Table: The Growing Signoff Headache
By Ed Sperling - 09 May, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss signoff issues with Rob Aitken, an ARM fellow; Sumbal Rafiq, director of engineering at Applied Micro; Ruben Molina, product marketing director for timing signoff at Cadence; Carey Robertson, director of product marketing for Calibre extraction at Mentor Graphics; and Robert Hoogenstryd, senior director of marketing for ... » read more

Experts At The Table: FinFET Questions And Issues
By Ed Sperling - 26 Apr, 2013 - Comments: 0

By Ed Sperling Low-Power/High-Performance Engineering sat down to discuss the current state and future promise of finFETs, and the myriad challenges, with Ruggero Castagnetti, an LSI fellow; Barry Pangrle, senior power methodology engineer at Nvidia; Steve Carlson, group director of marketing at Cadence; and Mary Ann White, director of product marketing at Synopsys. What follows are excerpts o... » read more

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