tag: Synopsys

The Power Of Analog
By Ed Sperling - 01 Dec, 2011 - Comments: 0

The shift into stacked die, expected to begin late next year with a big ramp in 2013, will shine a spotlight on analog design and its effect on power. For years, analog engineers have bragged about just how efficient their portion of a chip was versus digital. We’re about to find out if they’re right. Stacking die will, to a much greater extent, decouple analog from digital and leave it ... » read more

Playing The Voltage Game
By Ed Sperling - 01 Dec, 2011 - Comments: 0

y Ed Sperling Scaling down the voltage to boost battery life and cut energy costs has always been considered the best option, but it’s getting more difficult at advanced nodes and in stacked die packages. The key problems are noise and leakage. Lowering the voltage exacerbates both of them, forcing a rethinking of the whole design process starting at the architectural level and continuing... » read more

Bridging The Gap
By Ann Mutschler - 01 Dec, 2011 - Comments: 0

We talk all the time about hardware/software co-design, co-verification, etc., but what is really interesting now is how vital the connection is between power awareness and system-level design. Yes, it sounds obvious, but so far this is an untapped market with ideas still being batted around. As discussed in Parts 1, 2 and 3 of my article series on energy and power, to achieve the best power... » read more

Pest Control
By Achim Nohl - 17 Nov, 2011 - Comments: 0

By Achim Nohl Identifying and describing power issues is tough, let alone trying to solve them. “Power” issues can be very diverse. It’s even more difficult to explain how virtual prototypes can help to analyze “power” consumption. We often approach it by introducing how power information can be reflected in virtual prototype models, but there are many different goals and conflicting... » read more

Make Vs. Buy
By Ed Sperling - 17 Nov, 2011 - Comments: 0

By Ann Steffora Mutschler The confounding ‘make versus buy’ decision is understandably muddled by design complexity. Millions of gates, thousands of blocks, dozens of cores, plus software, packaging, and worries about physical effects don’t make this decision any easier. In some cases the process can be simplified by mandating that anything that doesn’t add differentiation really is... » read more

Build It Faster
By Ed Sperling - 17 Nov, 2011 - Comments: 0

By Ed Sperling Hitting market windows with IC designs has always been a struggle, but the race to the finish line is becoming more critical—and much more difficult. The reason: Market windows themselves are shrinking. Products that used to stick around for years may now only last for months, replaced by newer versions that offer either better performance or lower power. In many cases, par... » read more

CMP, ST et al offer 28nm FD-SOI for prototyping, research
By Various Writers - 06 Nov, 2011 - Comments: 0

Posted by Adele Hars, Editor-in-Chief, Advanced Substrate News ~  ~ What would a port to 28nm FD-SOI do for your design?  A recent announcement by CMP, STMicroelectronics and Soitec invites you to find out.  Specifically, ST’s CMOS 28nm Fully Depleted Silicon-On-Insulator (FD-SOI) process – which uses innovative silicon substrates from Soitec and incorporates robust, compact model... » read more

Five Important Changes That Will Affect Power
By Ed Sperling - 03 Nov, 2011 - Comments: 0

By Ed Sperling So far most of the energy savings in SoCs have been achieved using two main approaches—turning off most of the chip most of the time, and changing the materials used to insulate against current leakage. Over the next few years, changes to designs will be more radical, encompass more pieces of a bigger system, and they will be orders of magnitude more effective. From a marke... » read more

Energy Vs. Power
By Ed Sperling - 03 Nov, 2011 - Comments: 0

By Ann Steffora Mutschler In the quest to optimize an SoC for both power and energy efficiency many variables come into play. Target application, use cases, processor choice and amount of memory among other specifications all figure into the optimization equation. As discussed in Part 1 of this series, energy and power are different entities and must be understood distinctly from each other... » read more

Experts At The Table: Mobile Design Challenges
By Ed Sperling - 21 Oct, 2011 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss the increasing challenges of designing for mobile devices with Qi Wang, technical marketing group director at Cadence; Cary Chin, director of technical marketing for low-power solutions at Synopsys; Bernard Murphy, CTO of Atrenta; and Dave Reed, senior director of marketing at SpringSoft. What follows are excerpts of that conversation. ... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy