Blog Review: March 1


Siemens EDA's Chris Spear explains the UVM Factory and how it can facilitate collaboration by enabling injection of new features without affecting your team. Cadence's Paul McLellan looks at efforts to ensure chiplets from different companies work together, particularly when the creating companies didn't pre-plan for those specific chiplets to work together, as well as the problems of failur... » read more

How To Build A Rock-Solid Software Security Initiative


Application security testing is the starting block, not the finish line. While a critical component of every security program, the “penetrate and patch” approach is not a strategy. You need a complete program to lower risk exposure, measure progress, and demonstrate results. The most effective AppSec programs—or software security initiatives—are fine-tuned to their respective organiz... » read more

How To Build Resilience Into Chips


Disaggregating chips into specialized processors, memories, and architectures is becoming necessary for continued improvements in performance and power, but it's also contributing to unusual and often unpredictable errors in hardware that are extremely difficult to find. The sources of those errors can include anything from timing errors in a particular sequence, to gaps in bonds between chi... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Ambarella will use Samsung's 5nm process technology for its new CV3-AD685 automotive AI central domain controller, bringing "new levels of AI acceleration, system integration and power efficiency to ADAS and L2+ through L4 autonomous vehicles.” Renesas introduced four technologies for automotive communication gateway SoCs: (1) an architecture that dynamically changes... » read more

Taming Corner Explosion In Complex Chips


There is a tenuous balance between the number of corners a design team must consider, the cost of analysis, and the margins they insert to deal with them, but that tradeoff is becoming a lot more difficult. If too many corners of a chip are explored, it might never see production. If not enough corners are explored, it could reduce yield. And if too much margin is added, the device may not be c... » read more

Leveraging Chip Data To Improve Productivity


The semiconductor ecosystem is scrambling to use data more effectively in order to increase the productivity of design teams, improve yield in the fab, and ultimately increase reliability of systems in the field. Data collection, analysis, and utilization is at the center of all these efforts and more. Data can be collected at every point in the design-through-manufacturing flow and into the f... » read more

Dealing With Performance Bottlenecks In SoCs


A surge in the amount of data that SoCs need to process is bogging down performance, and while the processors themselves can handle that influx, memory and communication bandwidth are straining. The question now is what can be done about it. The gap between memory and CPU bandwidth — the so-called memory wall — is well documented and definitely not a new problem. But it has not gone away... » read more

Beyond Human Reach: Meeting Design Targets Faster With AI-Driven Optimization


The implementation flow for semiconductor devices is all about optimizing for power, performance, area (PPA), or some combination of these attributes. The history of this flow in electronic design automation (EDA) tools is all about adding more automation, tightening iterative loops, and reducing the number of iterations. The goal is converging to the PPA targets faster while using fewer resour... » read more

Blog Review: Feb. 22


Siemens EDA's Harry Foster observes that the FPGA market continues to go through a similar complexity curve that the IC/ASIC market experienced in the early and mid-2000 timeframe. Synopsys' Mitch Heins explores the benefits of heterogeneous integration of lasers and active gain elements in a silicon-based photonic IC, including reduced system costs, size, weight, and power along with improv... » read more

Best Practices For Cybersecurity-Aware SoC Development With ISO 21434


The growth of electronics in cars is exposing a new vector for cyberattacks on owners and automotive companies’ reputations. The potential human cost of an attack on the car’s electronics is driving urgency in the adoption of cybersecurity-aware practices, from OEMs and Tier 1s to every component supplier in the automotive industry. The standard “ISO/SAE 21434:2021 Road vehicles — Cyber... » read more

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