Week In Review: Design, Low Power


Tools and IP Scandinavian researchers used a laser-powered chip to transmit about 1.84 petabytes of data over a fiber optic cable in one second. The scientists said the technology could lead to faster broadband speeds and reduce the amount of energy used to keep the internet running. Imec said the semiconductor industry is likely to see increasing separation of power delivery and signal rou... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive, mobility Ford Motor Company revealed it lost $827 million in the third quarter because of parts shortages and unexpected supplier costs. Those shortages affected 40,000 to 50,000 vehicles. The company is shutting down its interest in its self-driving car unit Argo.ai, which it shared with Volkswagen since 2019. Ford will instead focus on advanced driver-assist systems (ADAS), which... » read more

Raising IP Integration Up A Level


An increase in the number and complexity of IP blocks, coupled with changing architectures and design concerns, are driving up the need for new tools that can enable, automate, and optimize integration in advanced chips and packages. Power, security, verification and a host of other issues are cross-cutting concerns, and they make pure hierarchical approaches difficult. Adding to future comp... » read more

Fabless IDMs Redefine The Leading Edge


Large systems companies are looking more like integrated device manufacturers, designing their own advanced chips, packages, and systems for internal use. But because these are not pure-play chip companies, they are disrupting a 10-year cadence of customization and standardization that has defined the chip industry from its inception, and extending the period of innovation without the associate... » read more

Enabling The Highest Levels Of SoC Security


The tremendous data and bandwidth growth in the era of supercomputing is driving technological advances across markets and is reshaping system-on-chip (SoC) designs supporting new compute architectures, more acceleration, and more storage. As high bandwidth interfaces including DDR, PCIe, CXL, Ethernet, HDMI and DisplayPort are proliferating and evolving from one generation to another, so does ... » read more

Faster And Smarter LVS For The SoC Era


Development of a modern system-on-chip (SoC) device is a long and incredibly complex process. Design teams rely on a huge range of tools, technologies, and methodologies to get the job done. Given the ongoing advances in silicon technology and design architecture, the tools are in a constant state of evolution. Logic-versus-schematic (LVS) checking is one of those tools. This is one of the earl... » read more

Blog Review: Oct. 26


Synopsys' Teng-Kiat Lee and Sandeep Mehndiratta argue that IC design in the cloud can support an existing on-prem strategy, enable large and small enterprises to manage cost and capacity more effectively, and offer security for valuable semiconductor IP. Siemens EDA's Chris Spear finds that SystemVerilog classes are a good way to encapsulate both variables and the routines that operates on t... » read more

Chip Challenges In The Metaverse


The metaverse is pushing the limits of chip design, despite uncertainty about how much raw horsepower these devices ultimately will require to deliver an immersive blend of augmented, virtual, and mixed reality. The big challenge in developing these systems is the ability to process mixed data types in real time while the data moves uninterrupted at lightning speed. That requires the integra... » read more

Optimizing Vmin With Path Margin Monitors


By Firooz Massoudi and Ash Patel Choosing the right operating voltage for various digital blocks within a semiconductor device is one of the most important tasks faced by chip designers. Operating voltage has major effects on performance, power consumption, and reliability. Increasing the voltage generally increases performance, but at the cost of more power and higher lifetime operating cos... » read more

Blog Review: Oct. 19


Siemens EDA's Harry Foster examines trends related to various aspects of FPGA design and the growing design complexity associated with increasing number of embedded processor cores, asynchronous clock domains, and more safety features. Synopsys' Twan Korthorst and Kenneth Larsen take a broad look at silicon photonics, including the benefits of electronic integration, accelerating the develop... » read more

← Older posts Newer posts →