tag: Synopsys

Software Self-Test As A Safety Mechanism For Processing Units
By Synopsys - 30 Nov, 2022 - Comments: 0

The growing dependency of modern automobiles on electronic functions increases the need for a variety of integrated circuits (ICs) for safety-critical applications. Requirements coming from different in-car subsystems drives the need for chip manufacturers to create a wide range of specialized solutions. This, in turn, raises the bar for automotive IP suppliers and pushes them to offer configur... » read more

Blog Review: Nov. 30
By Jesse Allen - 30 Nov, 2022 - Comments: 0

Cadence's Sangeeta Soni explores how the configuration space for CXL 1.1 and CXL 2.0 varies and discusses newly introduced registers for the CXL-compliant devices and how they are discovered during the CXL enumeration flow. Siemens EDA's Harry Foster continues examining trends in FPGA verification effort by looking at where both design and verification engineers spend their time. Synopsys... » read more

Improving Concurrent Chip Design, Manufacturing, And Test Flows
By Ann Mutschler - 28 Nov, 2022 - Comments: 0

Semiconductor design, manufacturing, and test are becoming much more tightly integrated as the chip industry seeks to optimize designs using fewer engineers, setting the stage for greater efficiencies and potentially lower chip costs without just relying on economies of scale. The glue between these various processes is data, and the chip industry is working to weave together various steps t... » read more

Radiation Tolerance Is Not Just For Rocket Scientists
By Synopsys - 23 Nov, 2022 - Comments: 0

As technology scales, soft errors from particle radiation are becoming increasingly concerning for in-field reliability. These radiation effects are called Single Event Upsets (SEU) and the frequency of the failures due to SEUs is known as the Soft Error Rate (SER). Soft errors are failures due to external sources. By contrast, hard errors refer to actual process manufacturing defects or electr... » read more

Blog Review: Nov. 23
By Jesse Allen - 23 Nov, 2022 - Comments: 0

Siemens EDA's Harry Foster looks at multiple data points to get a sense of effort spent in FPGA verification and increasing demand for FPGA verification engineers. Synopsys' Rimpy Chugh, Himanshu Kathuria, and Rohit Kumar Ohlayan argue that the quality of the design and testbench code is critical to a project’s success and that linting offers a comprehensive checking process for teams to s... » read more

Is UCIe Really Universal?
By Brian Bailey - 22 Nov, 2022 - Comments: 3

Chiplets are rapidly becoming the means to overcome the slowing of Moore's Law, but whether one interface is capable of joining them all together isn't clear yet. The Universal Chiplet Interconnect Express (UCIe) believes it will work, but some in the industry remain unconvinced. At least part of the problem is that interconnect standards are never truly finished. Even today, the protocols tha... » read more

Addressing Three Big Challenges In Silicon Realization
By Bradley Geden - 22 Nov, 2022 - Comments: 0

There is no better way to gain insight into prevailing technical challenges than bringing together industry experts to share experiences and proposed solutions. Silicon realization—the ability to design and build today’s complex semiconductors—is one domain with no shortage of challenges. The quest for the best power, performance, and area, and delivery of first-time-right silicon, requir... » read more

The Drive Toward Virtual Prototypes
By Brian Bailey - 22 Nov, 2022 - Comments: 1

Chipmakers are piling an increasing set of demands on virtual prototypes that go well beyond its original scope, forcing EDA companies to significantly rethink models, abstractions, interfaces, view orthogonality, and flows. The virtual prototype has been around for at least 20 years, but its role has been limited. It has largely been used as an integration and analysis platform for models t... » read more

Week In Review: Auto, Security, Pervasive Computing
By SE Staff - 18 Nov, 2022 - Comments: 0

Automotive, mobility Infineon has a non-binding Memorandum of Understanding to supply automaker Stellantis with CoolSiC “bare die” chips by reserving manufacturing capacity in the second half of the decade to the direct Tier 1 suppliers of Stellantis. CoolSiCs are Infineon’s silicon carbide (SiC) semiconductors. Stellantis will acquire aiMotive, a startup specializing in AI and autono... » read more

Hot Trends In Semiconductor Thermal Management
By Karen Heyman - 17 Nov, 2022 - Comments: 1

Increasing thermal challenges, as the industry moves into 3D packaging and continues to scale digital logic, are pushing the limits of R&D. The basic physics of having too much heat trapped in too small a space is leading to tangible problems, like consumer products that are too hot to hold. Far worse, however, is the loss of power and reliability, as overheated DRAM has to continually r... » read more

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