tag: TEL

Why Fabs Worry About Tool Parts
By Mark LaPedus - 17 Aug, 2017 - Comments: 2

Achieving high yields with acceptable costs is becoming much more difficult as chipmakers migrate to next-generation 3D NAND and finFET devices—but not just because of rising complexity or lithography issues. To fabricate an advanced logic chip, for example, a wafer moves from one piece of equipment to another in what amounts to 1,000 process steps or more in a fab. Any glitch with the equ... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 11 Aug, 2017 - Comments: 0

Fab tools Lam Research held an analyst event this week. The company indicated that the industry is in the midst of a memory boom, including both DRAM and 3D NAND. According to Amit Daryanani, an analyst with RBC, here was one of the big takeaways at the event: “The memory spend portion of WFE is more sustainable than previously assumed due to end-market drivers such as big data, automation, ... » read more

Cheaper Fan-Outs Ahead
By Mark LaPedus - 07 Aug, 2017 - Comments: 6

Packaging houses continue to ramp up fan-out wafer-level packages in the market, but customers want lower cost fan-out products for a broader range of applications, such as consumer, RF and smartphones. So in R&D, the industry for some time has been developing next-generation fan-out using a panel-level format, a technology that could potentially lower the cost of fan-out. But there are ... » read more

200mm Crisis?
By Mark LaPedus - 18 May, 2017 - Comments: 7

Over the last year or so, the IC industry has experienced an acute shortage of both 200mm fab capacity and 200mm equipment amid a surge of demand for certain chips. Right now, though, the 200mm shortfall is much worse than before. But this situation isn’t expected to improve for both elements in the second half of 2017, and perhaps beyond. On the capacity front, chipmakers are generally... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 21 Apr, 2017 - Comments: 0

Fab tool vendors In the wafer fab equipment (WFE) rankings, Applied Materials was the leader in terms of market share in 2016, according to Gartner. For WFE, Lam Research jumped from fourth place in 2015 to second place in the rankings in 2016, according to Gartner. ASML was third, followed by TEL. Meanwhile, VLSI Research recently released its ranking for both front-end and backend equipment.... » read more

Sizing up China’s Fab Tool Biz
By Mark LaPedus - 20 Apr, 2017 - Comments: 0

China is pouring billions of dollars into its semiconductor industry and is building several new fabs. As reported, China is bolstering its IC industry for good reason. China is trying to reduce its huge trade imbalance in ICs. The country continues to import a large percentage of its chips from foreign vendors. Behind the scenes, China also continues to develop its domestic semiconductor eq... » read more

The Other Side Of H1-B Visas
By Katherine Derbyshire - 20 Apr, 2017 - Comments: 0

There is a lot of discussion these days about “Hire American.” But what does that actually mean in practice? I’m at the Materials Research Society Spring Meeting this week, where one of the presentations was by a scientist who works at the TEL Technology Center, America, in Albany, NY. It’s the largest Tokyo Electron research center outside of Japan. It’s affiliated with the SUNY P... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 14 Apr, 2017 - Comments: 0

Fab equipment and test VLSI Research has released its top 10 semiconductor equipment supplier ranking in terms of sales in 2016. Applied Materials topped the list again, achieving a growth of 18%. ASML was second, followed by Lam Research, TEL and KLA-Tencor. Fig. 1: Ranking based on 2016 sales. Source: VLSI Research. Unic Capital Management, a Chinese-based private equity fund, announ... » read more

Electroplating IC Packages
By Mark LaPedus - 10 Apr, 2017 - Comments: 2

The electrochemical deposition (ECD) equipment market for IC packaging is heating up as 2.5D, 3D and fan-out technologies begin to ramp. [getentity id="22817" e_name="Applied Materials"]  recently rolled out an ECD system for IC packaging. In addition, Lam Research, TEL and others compete in the growing but competitive ECD equipment market for packaging. ECD—sometimes referred to as pl... » read more

Patterning Problems Pile Up
By Mark LaPedus - 20 Mar, 2017 - Comments: 4

Chipmakers are ramping up 16nm/14nm finFET processes, with 10nm and 7nm now moving into early production. But at 10nm and beyond, chipmakers are running into a new set of problems. While shrinking feature sizes of a device down to 10nm, 7nm, 5nm and perhaps beyond is possible using current and future fab equipment, there doesn't seem to be a simple way to solve the edge placement error (EPE)... » read more

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