tag: test

Test Engineers In Very Short Supply
By Susan Rambo - 08 Dec, 2020 - Comments: 2

Semiconductor design, verification, manufacturing, and test requires an army of engineers, with each playing a special role. But increasingly, these disciplines also require additional training to be able to understand the context around their jobs, and that is making it harder to fill different positions at a time when the chip industry already is severely short-staffed. This is particularl... » read more

Silo Busting In The Design Flow
By Brian Bailey - 24 Nov, 2020 - Comments: 0

An increasing number of dependencies in system design are forcing companies, people, tools, and flows to become more collaborative. Design and EDA companies must adapt to this new reality because it has become impossible for anyone to do it all by themselves. Moreover, what happens in manufacturing and packaging needs to be considered up front, and what gets designed in the design phase may ... » read more

Taking Advantage Of Outsourced Test Services
By Vineet Pancholi - 19 Nov, 2020 - Comments: 0

The business model in today’s competitive world of commerce has shifted over recent years to “services.” Companies like Microsoft, Amazon and Google are prime success stories that have advanced the industry with business-enabling services. These economic productivity improvement services allow their customers to focus on product architecture, design and quick time to market. The service p... » read more

Making IC Test Faster And More Accessible: Part 2
By Randy Fish - 11 Nov, 2020 - Comments: 0

Recently, my colleague Robert Ruiz described a new approach to scan test that utilizes the high-speed I/O (HSIO) ports that exist on most chips. The benefits of this new approach include reduced test time and cost thanks to the high-speed interface. Simplified pin electronics and tester setup are also benefits, as is the ability to run manufacturing tests in the field in support of silicon life... » read more

Modified X-Band Push-Push Oscillator Simulation And Measurement
By Cadence - 11 Nov, 2020 - Comments: 0

This eBook that explores the push-push oscillator configuration via harmonic balance (HB) computer simulation and test measurement. The unique operation of the push-push oscillator configuration is explored using HB simulation of spectral content and time-domain voltage waveforms. Dynamic load lines are investigated and utilized to explore peak signal excursion and degree of nonlinearity. Predi... » read more

Does HW Vs. SW Choice Affect Quality And Reliability?
By Bryon Moyer - 10 Nov, 2020 - Comments: 0

Electronic systems comprise both hardware and software. Which functions are implemented with hardware and which with software are decisions made based upon a wide variety of considerations, including concerns about quality and reliability. Hardware may intrinsically provide for higher device quality, but it is also the source of reliability concerns. This is in contrast with popular views of... » read more

Making IC Test Faster And More Accessible: Part 1
By Robert Ruiz - 30 Oct, 2020 - Comments: 0

The fundamental challenges of IC test have been the same for a long time. At the heart of all test strategies is controllability and observability. First, control the state of the chip with known test vectors and then observe the chip to determine if it exhibits good or faulty behavior. There have been many innovations over the years to make the required testing of chips more tractable. Thanks ... » read more

Scramble For The White Space
By Bryon Moyer - 13 Oct, 2020 - Comments: 0

Chipmakers are pushing to utilize more of the unused portion of a design for different functions, reducing margin in the rest of the chip to more clearly define that white space. White space typically is used to relieve back-end routing congestion before all of the silicon area is used up. But a significant amount of space still remain unused. That provides an opportunity for inserting monit... » read more

Eliminating Ground-Loop Induced Noise
By Peter Andrews - 13 Oct, 2020 - Comments: 0

As semiconductor device performance increases, especially for low power and higher speed ICs, testing low frequency 1/f, RTN and phase noise with improved signal-to-noise ratio is required. Finding and eliminating unwanted noise is required in multiple areas. Noise sources can be found inside a prober, outside a prober, and in a measurement TestCell. Historically, TestCell-generated noise was o... » read more

The Quest To Make 5G Systems Reliable
By Ed Sperling - 13 Oct, 2020 - Comments: 0

Semiconductor Engineering sat down to discuss 5G reliability with Anthony Lord, director of RF product marketing at FormFactor; Noam Brousard, system vice president at proteanTecs; Andre van de Geijn, business development manager at yieldHUB; and David Hall, head of semiconductor marketing at National Instruments. What follows are excerpts of that conversation. SE: How do we measure the reli... » read more

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