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Part Average Tests For Auto ICs Not Good Enough

Advanced node chips and packages require additional inspection, analysis and time, all of which adds cost.

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Part Average Testing (PAT) has long been used in automotive. For some semiconductor technologies it remains viable, while for others it is no longer good enough.

Automakers are bracing for chips developed at advanced process nodes with much trepidation. Tight control of their supply chains and a reliance upon mature electronic processes so far have enabled them to increase electronic components in a well-managed fashion. But as the number of chips used in cars increases from hundreds today to thousands in the future, and as the level of automation continues to grow, they are facing a raft of changes for which there is little precedence.

This includes everything from logic chips developed using the most advanced process geometries, to new packaging technology that requires ball grid arrays to replace wire bonding. And while automakers are demanding zero defects, others are worried about vehicle system failures stemming from part average testing, which may not be sufficient for all of the chips used in a vehicle.

PAT uses statistical control limits during manufacturing to improve both yield and end-of-the-line quality. In the auto industry, engineers have been applying this concept to electrical test measurements industry for nearly 30 years.

“History has shown that parts with abnormal characteristics significantly contribute to quality and reliability problems,” says the PAT guidelines from the Automotive Electronics Council. “Use of this technique will also flag process shifts and provide a source of rapid feedback that should prevent quality accidents.”

At least that has worked with mechanical systems and older-node devices, and semiconductor data analytics and ATE vendors have been assisting their customers in applying PAT. But that longer suffices for AI systems in vehicles, which require the most advanced nodes for real-time decision-making in vehicles. As a result, product and reliability engineers are migrating to more sophisticated outlier detection techniques, and increased coverage for inspection and test.

Recently, inline meteorology companies, such as KLA and SVXR, have developed faster scanning technology that now enables 100% sampling of wafers and packages. Thus, like PAT, population statistics now can be applied to image analysis.

“Automotive customers have a long legacy of focusing on quality to attract and retain customers, said Jay Rathert, senior director of strategic collaborations at KLA. “Their approach is very analytical and proactive, and they are bringing that same rigor to semiconductors. The majority of automotive chips in cars today are from mature processes. The new challenge is managing the many complex factors affecting quality as they integrate cutting edge ADAS chips built on advanced design rules.”

Automotive silicon technologies and test needs
While the drumbeat in automotive sector has been “zero defects,” getting there is becoming more problematic. Engineers need to consider a wide range of semiconductor devices and their associated test costs when choosing an overall test strategy. Zero defects is expensive, and profit margins are tight.

Automobiles include a wide range of semiconductor technologies. These technologies have different critical dimensions, failure mechanisms, and process variability. Test requirements will vary, depending upon any of these factors. A high-power MOSFET for power applications will have vastly different test needs than a complex neural network, for example.


Fig. 1: Diversified silicon technologies found in automotive, including eNVM, logic main memory (Logic/MM), mix mode RF (MMRF), embedded high voltage (eHV), bipolar CMOS-DMOS (BCD) and CMOS image sensor (CIS)/MEMS. Source: UMC

Some of these changes are evolutionary. Rather than a purely mechanical actuator, for example, there now are sensors integrated with those actuators to measure attributes such as pressure, temperate, position, airflow, and tilt angle. MEMS and analog circuits dominate these sensors, so they are unlikely to be processed on advanced process nodes.

Other changes are revolutionary, meant to replace functions traditionally handled by the driver with automated responses in electric vehicles. These revolutionary shifts motivate other shifts in fabrication processes. Among the changes here:

  • ADAS capabilities, which require advanced process nodes and devices with hundreds of millions or billions of transistors;
  • Wireless capabilities, including Bluetooth and 5G, and
  • Vehicle electrification, which increases the usage of discrete power MOSFETS and power management ICs.

Nearly all new vehicles have some advanced chips. In 2018 AAA reported that 92.7% of new vehicles available in the United States possessed at least one ADAS feature. As more features are added with each automation level, the number of advanced chips and packages will rise proportionately.

Increasingly, that also means automakers will be competing for capacity at leading-edge fabs and at specialty fabs. They will be competing with gaming devices, computers and smart phones, all of which run at considerably higher volume than automotive chips. And they will be competing for specialty fab capacity, which tend to operate at relatively low volume, using different materials. How that will impact quality and time spent in the fab for various testing and inspection, as well as sufficient capacity for manufacturing, remains to be seen.


Fig. 2: Silicon CMOS capacity for 2021. Source: IC Insights

Power management is a case in point. In contrast to CMOS technology for power management devices, the process technologies have considerably larger critical dimensions. STMicroelectronics’ BCD family of silicon processes for high density process nodes ranges from 0.32µm to 0.11µm, while for high voltage BCD the process nodes range from 0.32µm to 0.16 µm. UMC’s BCD technology nodes range from 0.5µm to 0.11µm. Similarly, RF technologies can range from 5µm to 0.11µm process nodes. The technologies also include BiCMOS on SiGe, GaAs, and silicon carbide. Due to its tolerance of harsh environmental conditions, design engineers find silicon carbide devices attractive, and the devices have applications in both wireless and power management modules.

For meeting manufacturing test requirements, the diversity of integrated products in current vehicles and forecasted for advanced technologies, there is no one size fit all test requirements. Each product/process combination will have unique challenges for test and reliability engineers to balance the cost/yield/quality triangle. PAT maybe good enough sometimes, but not others, and currently that dividing line is not very clear.

Part Average Testing
In automotive IC supplier companies, product and reliability engineers do use simple outlier detection test methods. With PAT engineers, leverage a single parametric measurement and statistical methods to determine limits. Basically, even if the DUT passes the data sheet limits, if it is outside your distribution the part is marked as “fail.” It represents a shift from a specification based to a defect-based test method.


Fig. 3: Part Average Testing (reference AEC Q001_rev D). Source: Anne Meixner/Semiconductor Engineering

The AEC’s PAT guideline provides “a general method for removing abnormal parts and thus improve the quality and reliability of parts supplied per AEC-Q100 and AEC-Q101… The exact methods applied may vary from what is described in this guideline, specifically if distributions are non-normal. Such derived methods may be employed with good statistical justification.”

Engineers determine static PAT limits based upon a reasonable size of production material. Setting such limits needs to be done with careful consideration of the distribution and associated statistical metrics (median vs. mean). So static PAT limits can be set and programmed in the test program, and an engineer is done. Engineers can apply static PAT at both wafer and final test.

“Dynamic PAT has the advantage of dynamically setting limits based on the performance of a wafer or lot,” said Carl Moore, yield management specialist at yieldHUB. “Often, the distribution on a wafer is much tighter than that of a lot or group of lots. With DPAT, you can set the limits dynamically for that wafer distribution and flag outliers from the norm. If you have wider limits to accommodate multiple wafers or lots, then you may not see an outlier in the larger distribution of multiple wafers or multiple lot.”

There are several reasons why product and reliability engineers move from static to dynamic PAT limits.

“The IC supplier is motivated to move to dynamic PAT because static PAT is too crude of a screen and costs too much yield. The IC customer motivation is the desire for more effective screening and better quality,” observed Ken Butler, IEEE fellow and former test systems architect at Texas Instruments.

Alon Malki, senior director of data science at NI, agrees. “Using outlier detection to reduce field returns is a common methodology for at our customers,” he said. “So utilizing DPAT further optimizes the ability to detect marginal devices.”

Easing an engineer’s burden
Yield management systems (YMS), both within IDMs and those provided by third-party data analytic companies, support engineers in setting up the algorithm parameters guiding the static and dynamic PAT limit setting.

“A YMS supports engineers by providing the analysis to easily setup and run an analysis on their product,” said Moore. “Basically, the process is running a simulation, and then setting the recipe to run in production. Once set up, the process is automated, and the engineer doesn’t have to spend time collecting the data.”

The more historical data available to engineers, the more they can understand the variability in parameters they may choose.

“NI solution allows engineers to perform large-scale statistical analysis to calculate the values needed to propose/adjust DPAT limits per test,” said Malki. “The outlier detection platform has a simulation capability over very large amount of historical data, allowing the engineers to gauge the impact of the selected configuration.”

However, data collection at the tester with older formats impedes the ability for easy application of dynamic PAT. Most engineers writing test programs use the general records format for parametric measurement in STDF, which results in a lot of inconsistency. Two SEMI standards, TEMS and RITdb, are making progress. When they are complete, they will lighten the data wrangling work needed today to prepare data for dynamic PAT.

“For automotive, a lot of our customers wanted us to directly support part average testing, which means every test program has to be written with part average testing embedded,” said Mark Roos CEO of Roos Instruments. “We demonstrated with RITdb that we can move the part average testing outside of the tester. Every customer has a different definition for part average testing. RITdb gives the customer control over the quality metrics they’re using and gets the ATE vendor out of their way.”

When PAT fails to deliver
Those standards will help, for sure. But in the spirit of continuous improvement, product and reliability engineers reduce customer field returns and zero-time test escapes either by adding new tests or making more use of existing parametric test data.

As the automotive industry adopts more advanced CMOS processes they can take advantage of the work done at these nodes for ASICs and complex processing units. However, these rely upon using more than one parameter, which adds a new level of complexity.

“The adoption of semantic data models and advances in machine learning have made it easier for organizations to improve quality, performance, and yield by leveraging their large datasets generated from different phases of the manufacturing process,” said Jeff David, vice president of AI Solutions at PDF Solutions. “In the Exensio platform, we have employed predictive models using more than one variable that can screen bad die better than traditional PAT. Additionally, we are enabling customers to push machine learning models out to the edge so that predictions can be made in a more timely and secure manner.”

Still, complexity continues to grow. “Engineering analysis shows that certain fail categories are difficult to screen using univariate methods,” said Butler. “When that happens, multivariate is the next logical step. The challenge for multivariate is that the number of possible parameter combinations is large, so which screens do you choose?”

To help engineers with that choice, all companies that offer YMS platforms enable engineers to simulate multivariate combinations with two-dimensional being the most common. In addition, automotive IC suppliers can use geo-spatial outlier predictive models to identify latent defects. At wafer level these are particularly powerful prediction techniques.

Physical inspection also can be ratcheted up significantly due to faster tools and higher precision, which can have a big impact on coverage. “There are several benefits of conducting 100% inspection and metrology,” said Tim Skunes, vice president of R&D at CyberOptics. “For example, there may be cluster defects which could be an indication of an equipment or process issue. There could be repeating defects that could potentially indicate a mask/reticle defect.”

The recent development of faster optical scan technology has enabled 100% sampling of wafers at critical layers. This data can be added to any YMS platform for analysis of yield loss issues. More importantly, for the automotive industry, this technology enables detection of latent defects prior to wafer probe testing. With scans on all wafers, engineers can apply the same population statistics to identify maverick die as they have done with electrical test.

“Legacy solutions for part average testing are built on a foundation of electrical test,” said KLA’s Rathert. “It has evolved into a multitude of clever variations to recognize and remove at-risk die. But escapes are still happening because of latent defects and unavoidable test gaps. KLA’s I-PAT (Inline PAT) solution brings a new data stream into the die go/no-go decision, identifying outlier die based on manufacturing defectivity. Many of these dies will ultimately fail test, but a surprisingly high number do not — and this has generated a lot of interest in it as complementary solution to help reach part-per-billion escape rates.”

In their 2020 SPIE paper, KLA authors described the technology: “Each defect is assigned a weight based on its impact to various ‘ground truth’ indicators. The combined impact of all defects in a given die stacked across all inspections is aggregated into a die-level metric. Plotting the die-level I-PAT metrics for all the die as a Pareto chart allows outliers to be identified using accepted statistical methods.”

Future directions
The mantra of “zero defects” has been echoing for nearly two decades among semiconductor suppliers to the automotive sector. Yet contemporary vehicles include a diverse range of semiconductor technologies. They encompass single power MOSFETs that manage a power module in an electronic drive train and neural network processers to correct a car’s drift within a lane.

For univariate outlier detection techniques, static and dynamic PAT will remain viable for a substantial subset of semiconductor devices fueling the automotive sector. But responding to field returns, striving for zero defects and comprehending reliability mechanisms eventually could drive engineers working with this subset to gravitate to multi-variant outlier detection techniques.

In the past 15 years, yield management system developments have reduced the engineering burden to implement PAT. “The modern database/analytics platforms can readily calculate dynamic PAT results on a pre-described, or even an on-demand basis,” said Mike McIntyre, director of software product management at Onto Innovation. “The fact that a system can be responsible for determining and applying the right set of limits to the right materials eliminates a large responsibility for the engineer.”

Latent defects remain a challenge for engineers all along the product manufacturing supply chain. Advanced outlier detection techniques already have been used with some automotive IC devices. Advances in wafer scan technology promise additional capabilities.

All product and quality engineers appreciate the ability to apply a more surgical scalpel to discerning which defect will have the biggest impact for the customer. In automotive where margins are always under pressure, the test technique used often comes down to cost — equipment, time, yield vs. quality.

So will PAT ever go away? “Very few test methods ever ‘go away,’ but they are often supplemented with newer/better methods,” said IEEE’s Butler. “Take, for example, stuck-at testing being supplemented with transition testing. There are arguments that cell-aware technologies may do away with conventional stuck-at and transition testing, but if that happens, it will take a long time. I would have the same thought process for screening methods such as PAT. So, I agree that PAT will continue to be utilized indefinitely. But the fraction of the manufacturing volume to which it is applied will be decreasing over time as more sophisticated, efficient, and effective methods are brought on-line.

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