tag: test

Improving In-System Test With Tessent VersaPoint Test Point Technology
By Mentor, a Siemens Business - 14 Jan, 2020 - Comments: 0

This paper describes a new versatile test point technology called VersaPoint, which has been developed specifically to work with designs implementing mixed EDT/LBIST methodologies to reduce EDT pattern counts and improve Logic BIST (LBIST) test coverage. VersaPoint test points can reduce compressed pattern counts 2X to 4X beyond compression alone and improve LBIST test coverage beyond what is p... » read more

Making 3D Structures And Packages More Reliable
By Ed Sperling - 14 Jan, 2020 - Comments: 0

The move to smaller vertical structures and complex packaging schemes is straining existing testing approaches, particularly in heterogeneous combinations on a single chip and in multi-die packages. The complexity of these devices has exploded with the slowdown in scaling, as chipmakers turn to architectural solutions and new transistor structures rather than just relying on shrinking featur... » read more

Planning Ahead For In-System Test Of Automotive ICs
By Jeff Mayer - 14 Jan, 2020 - Comments: 0

Automobiles are increasingly more like electronic devices than mechanical platforms. As a share of the total cost of a car, electronics components have grown from about 5% in 1970 to 35% in 2010. Electronics are projected to account for 50% by 2030 (Deloitte, 2019). Some of the electronics are for passive operations, like display or In-Vehicle Infotainment (IVI) systems, but a growing proportio... » read more

The Impact Of Test Engineers
By Marie Ryan - 14 Jan, 2020 - Comments: 0

As testing is at the end of each project, it’s often seen as a non-value-added necessity that just needs to be done. This is why Test Engineers often feel overlooked and undervalued. Previously, we explained why engineering managers should value their test engineers, and told them how to get the most out of their teams. Today we’ll explore how test engineers can learn to understand the... » read more

AI Chips Driving Need For New Test Implementation Methodologies
By David Buck - 19 Dec, 2019 - Comments: 0

Artificial intelligence has never been more in the news than it is today.  From picking stock market investments to autonomous driving, we have heard about what AI can do when it works and what happens when it goes awry. The consequences are huge if AI doesn’t work which puts a lot of pressure on hardware engineers to ensure that their chips can be extensively tested for proper and safe func... » read more

Testing Autonomous Vehicles
By Ed Sperling - 16 Dec, 2019 - Comments: 0

Jeff Phillips, head of automotive marketing at National Instruments, talks about how to ensure that automotive systems are reliable and safe, how test needs to shift to adapt to continual updates and changes, and why this is particularly challenging in a world where there is no known right answer. » read more

How To Ensure Reliability
By Ed Sperling - 13 Dec, 2019 - Comments: 0

Michael Schuldenfrei, corporate technology fellow at OptimalPlus, talks about how to measure quality, why it’s essential to understand all of the possible variables in the testing process, and why outliers are no longer considered sufficient to ensure reliability. » read more

Reliability At 5nm And Below
By Ed Sperling - 10 Dec, 2019 - Comments: 2

The best way to figure out how a chip or package will age is to bake it in an oven, heat it in a pressure cooker, and stick it in a freezer. Those are all standard methods to accelerate physical effects and the effects of aging, but it's not clear they will continue working as chips shrink to 5nm and 3nm, or as they are included in multi-die packages. Extending any of those kitchen-like appr... » read more

Gaps Emerge In Test And Analytics
By Ed Sperling - 10 Dec, 2019 - Comments: 0

Sensor and process drift, increased design complexity, and continued optimization of circuitry throughout its lifetime are driving test and analytics in new directions, requiring a series of base comparisons against which equipment and processes can be measured. In the design world this type of platform is called a digital twin, but in the test world there is no equivalent today. And as more... » read more

Squeezing Out More Test Compression
By Jeff Mayer - 10 Dec, 2019 - Comments: 0

The trend in semiconductors leads to more IC test data volume, longer test times, and higher test costs. Embedded deterministic test (EDT) has continued to deliver more compression, which has been quite effective at containing test costs. For many designs, standard test compressions is enough, but ICs for use in automotive and medical devices require a higher manufacturing test quality, which t... » read more

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