Chip Industry Technical Paper Roundup: July 16


New technical papers recently added to Semiconductor Engineering’s library. [table id=244 /] More ReadingTechnical Paper Library home   » read more

Chip Industry Week In Review


The U.S. Department of Commerce issued a notice of intent  to fund new R&D activities to establish and accelerate domestic advanced packaging capacity. CHIPS for America expects to award up to $1.6 billion in funding innovation across five R&D areas, as outlined in the vision for the National Advanced Packaging Manufacturing Program (NAPMP), with about $150 million per award in each... » read more

Analysis Of The On-DRAM-Die Read Disturbance Mitigation Method: Per Row Activation Counting


A technical paper titled “Understanding the Security Benefits and Overheads of Emerging Industry Solutions to DRAM Read Disturbance” was published by researchers at ETH Zürich and TOBB University of Economics and Technology. Abstract: "We present the first rigorous security, performance, energy, and cost analyses of the state-of-the-art on-DRAM-die read disturbance mitigation method, Per... » read more

Chip Industry’s Technical Paper Roundup: Jan. 17


New technical papers added to Semiconductor Engineering’s library. [table id=74 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us posting li... » read more

FPGA-Based Prototyping Framework For Processing In DRAM (ETH Zurich & TOBB Univ.)


A technical paper titled "PiDRAM: A Holistic End-to-end FPGA-based Framework for Processing-in-DRAM" was published by researchers at ETH Zurich and TOBB University of Economics and Technology. Abstract "Processing-using-memory (PuM) techniques leverage the analog operation of memory cells to perform computation. Several recent works have demonstrated PuM techniques in off-the-shelf DRAM dev... » read more

Chip Industry’s Technical Paper Roundup: Oct. 4


New technical papers added to Semiconductor Engineering’s library this week. [table id=55 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

Decreasing Refresh Latency of Off-the-Shelf DRAM Chips


A new technical paper titled "HiRA: Hidden Row Activation for Reducing Refresh Latency of Off-the-Shelf DRAM Chips" was published by researchers at ETH Zürich, TOBB University of Economics and Technology and Galicia Supercomputing Center (CESGA). Abstract "DRAM is the building block of modern main memory systems. DRAM cells must be periodically refreshed to prevent data loss. Refresh oper... » read more

Technical Paper Round-Up: June 28


New technical papers added to Semiconductor Engineering’s library this week. [table id=35 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit f... » read more

End to End System Design for DRAM-based TRNG


Research paper titled "DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators" is presented from researchers at TOBB University of Economics and Technology and ETH Zurich. Abstract "Random number generation is an important task in a wide variety of critical applications including cryptographic algorithms, scientific simulations, and industrial testing tools. True ... » read more

QUAC-TRNG: High-Throughput True Random Number Generation Using Quadruple Row Activation in Commodity DRAM Chips


Abstract "True random number generators (TRNG) sample random physical processes to create large amounts of random numbers for various use cases, including security-critical cryptographic primitives, scientific simulations, machine learning applications, and even recreational entertainment. Unfortunately, not every computing system is equipped with dedicated TRNG hardware, limiting the applicat... » read more