RISC-V: Will There Be Other Open-Source Cores?

By Ed Sperling - 06 Oct, 2020 - Comments: 5

Part 3: Semiconductor Engineering sat down to discuss the business and technology landscape for RISC-V with Zdenek Prikryl, CTO of Codasip; Helena Handschuh, a Rambus Security Technologies fellow; Louie De Luna, director of marketing at Aldec; Shubhodeep Roy Choudhury, CEO of Valtrix Systems; and Bipul Talukdar, North America director of applications engineering at SmartDV. What follows are exc... » read more

Analog Chip Layout: Creativity Vs. Deadlines

By Benjamin Prautsch - 10 Sep, 2020 - Comments: 0

The entire design of integrated circuits, from the specification onward, depends on successful validation by measurement of microchips. One key milestone in this process is the completion of the layout. However, the path to reach this point can be quite difficult as many iterations are usually required. It includes: Iterations with the customer to finalize the specification. Iteratio... » read more

Optimizing For Energy In Physical Design

By Pierre-Alexandre Bou-Ach - 10 Sep, 2020 - Comments: 0

Energy is a precious resource, which should not be wasted. Energy drives economies and sustains societies. Predictions show that the energy of electronics may soon consume 20% to 33% of the global energy supply, as it is highlighted in this blog post about "Design and Manufacturing in 2030" from Greg Yeric, fellow at Arm. Energy efficiency is such an important global issue that it is ... » read more

It’s Eternal Spring For AI

By Rama Chellappa - 14 Jul, 2020 - Comments: 0

The field of Artificial Intelligence (AI) has had many ups and downs largely due to unrealistic expectations created by everyone involved including researchers, sponsors, developers, and even consumers. The “reemergence” of AI has lot to do with recent developments in supporting technologies and fields such as sensors, computing at macro and micro scales, communication networks and progre... » read more

Different Roles, Different Tools

By Tommy Mullane - 09 Jul, 2020 - Comments: 1

A question often posed is: does the use of tools and processes change as you go from block level to subsystem and chip level and as you add software to your system on chip (SoC)? And of course, the answer is that things change a lot. The primary differences between designing individual blocks and designing a big chip are that blocks tend to be designed by individual engineers or very small g... » read more

Gaps Emerging In System Integration

By Brian Bailey - 29 Jun, 2020 - Comments: 0

The system integration challenge is evolving, but existing tools and methods are not keeping up with the task. New tools and flows are needed to handle global concepts, such as power and thermal, that cannot be dealt with at the block level. As we potentially move into a new era where IP gets delivered as physical pieces of silicon, this lack of an accepted flow will become a stumbling block. ... » read more

Analog Design Needs To Change

By Dave Reed - 23 Apr, 2020 - Comments: 0

It’s an exciting time to be involved in analog design! Innovation in analog design methodology has been flourishing with the introduction of new tools and improved methodologies. And this innovation is badly needed; analog design is getting tougher. Design schedules remain tight, and the technical challenges analog designers face continue to grow – especially when moving to advanced node te... » read more

Machine Learning… Everywhere

By Stelios Diamantidis - 06 Feb, 2020 - Comments: 0

AI is transforming the world around us, creating an avenue to innovation across all sectors of the global economy. Today, AI can interact with humans through natural language; identify bank fraud and protect computer networks; drive cars around city streets; and play complex games like chess and Go. Machine-learning is offering solutions to many complex problems around us where analytical solut... » read more

Signal Integrity Through The Years

By Paul McLellan - 06 Feb, 2020 - Comments: 0

Yesterday, I started to talk about how new technologies find their way over time into EDA tools in my post How Technologies Get into EDA. Let's look at signal integrity as an example. We used not to worry about signal integrity at all. The first time anything like that impinged on my consciousness was in the early 1980s when we realized that we needed to start to consider the inductance... » read more

Functional Safety Implementation Goes Mainstream

By Mary Ann White - 24 Oct, 2019 - Comments: 0

Electronics engineers are being thrust into the automotive market like never before. The move to electrify automobiles, along with the advent of self-driving cars, means that silicon designers will be designing ever more sophisticated automotive ICs. But cars aren’t like most other electronic systems; it’s imperative that they cause no harm should they fail. This brings us to the realm o... » read more

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Knowledge Centers
Entities, people and technologies explored

Shift Left Is The Tip Of The Iceberg

A transformative change is underway for semiconductor design and EDA. New languages, models, and abstractions will need to be created.

by Brian Bailey

Partitioning In The Chiplet Era

Understanding how chiplets interact under different workloads is critical to ensuring signal integrity and optimal performance in heterogeneous designs.

by Ann Mutschler

3.5D: The Great Compromise

Pros and cons of a middle-ground chiplet assembly that combines 2.5D and 3D-IC.

by Ed Sperling

AI’s Role In Chip Design Widens, Drawing In New Startups

Focus is on letting engineers do much more with the same or fewer resources — and less drudgery.

by Karen Heyman

Key Technologies To Extend EUV To 14 Angstroms

Alongside high-NA EUV will be better-performing photoresists, reduced roughness using passivation and etch, and lateral etching to reduce tip-to-tip dimensions.

by Laura Peters

Memory Fundamentals For Engineers

eBook: Nearly everything you need to know about memory, including detailed explanations of the different types of memory; how and where these are used today; what's changing, which memories are successful and which ones might be in the future; and the limitations of each memory type.

by The SE Staff

What Comes After HBM For Chiplets

The standard for high-bandwidth memory limits design freedom at many levels, but that is required for interoperability. What freedoms can be taken from other functions to make chiplets possible?