Week In Review: Manufacturing, Test


Chipmakers TSMC has introduced another version of its 4nm process technology. The process, called N4X, is tailored for high-performance computing products. Recently, TSMC introduced another 4nm process, called N4P, which is an enhanced version of its 5nm technology. N4X is also an enhanced version of its 5nm technology. N4X, however, offers a performance boost of up to 15% over TSMC’s N5 pro... » read more

Next Steps For Panel-Level Packaging


Tanja Braun, group manager at Fraunhofer Institute for Reliability and Microintegration (IZM), sat down with Semiconductor Engineering to talk about III-V device packaging, chiplets, fan-out and panel-level processing. Fraunhofer IZM recently announced a new phase of its panel-level packaging consortium. What follows are excerpts of that discussion. SE: IC packaging isn’t new, but years a... » read more

Week In Review: Design, Low Power


Memory CEA-Leti demonstrated 16-kbit ferroelectric random-access memory (FeRAM) arrays at the 130nm node. It utilizes back-end-of-line (BEOL) integration of TiN/HfO2:Si/TiN ferroelectric capacitors as small as 0.16 µm² and solder reflow compatibility for the first time for this type of memory. The researchers anticipate it will be useful for embedded applications such at IoT and wearable dev... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive Features of Toyota’s key fobs for entering vehicles get turned off when drivers do not start paying a subscription fee when the complementary subscriptions end, says an article in Ars Technica. SiLC Technologies announced its compact Eyeonic Vision Sensor, a FMCW lidar sensor, is now commercially available. The sensor has a silicon photonic chip that keeps a lidar’s size down... » read more

Using Manufacturing Data To Boost Reliability


As chipmakers turn to increasingly customized and complex heterogeneous designs to boost performance per watt, they also are demanding lower defectivity and higher yields to help offset the rising design and manufacturing costs. Solving those issues is a mammoth multi-vendor effort. There can be hundreds of process steps in fabs and packaging houses. And as feature sizes continue to shrink, ... » read more

Week In Review: Manufacturing, Test


Packaging and test Taiwan’s ASE--the world’s largest OSAT--has announced the proposed sale and disposal of equity interests in its subsidiaries, GAPT Holding and ASE (Kun Shan), to Wise Road Capital, a private equity firm based in China. The deal has a value of $1.46 billion. The announcement is related to four ASE assembly and test facilities in China, including Shanghai, Suzhou, Kunsh... » read more

Week In Review: Design, Low Power


Infineon Technologies acquired Syntronixs Asia, which specializes in precision electroplating, a key process in the assembly process of semiconductors. Syntronixs Asia has a workforce of more than 500 people and has been a major service provider for Infineon since 2009. “Through this acquisition, we have made another important step to strengthen the resilience of our supply chain,” said Tho... » read more

China Accelerates Foundry, Power Semi Efforts


China has unveiled several initiatives to advance its domestic semiconductor industry, including a new and massive fab expansion campaign in the foundry, gallium-nitride (GaN), and silicon carbide (SiC) markets. The nation is making a big push into what it calls “third-generation semiconductors,” which is a misnomer. The term actually refers to two existing and common power semiconductor... » read more

End In Sight For Chip Shortages?


The current wave of semiconductor and IC packaging shortages is expected to extend well into 2022, but there are also signs that supply may finally catch up with demand. The same is true for manufacturing capacity, materials and equipment in both the semiconductor and packaging sectors. Nonetheless, after a period of shortages in all segments, the current school of thought is that chip suppl... » read more

A Broad Look Inside Advanced Packaging


Choon Lee, chief technology officer of JCET, sat down with Semiconductor Engineering to talk about the semiconductor market, Moore’s Law, chiplets, fan-out packaging, and manufacturing issues. What follows are excerpts of that discussion. SE: Where are we in the semiconductor cycle right now? Lee: If you look at 2020, it was around 10% growth in the overall semiconductor industry. ... » read more

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