Chip Industry Week In Review


President Biden will raise the tariff rate on Chinese semiconductors from 25% to 50% by 2025, among other measures to protect U.S. businesses from China’s trade practices. Also, as part of President Biden’s AI Executive Order, the Administration released steps to protect workers from AI risks, including human oversight of systems and transparency about what systems are being used. Intel ... » read more

Chip Industry Technical Paper Roundup: April 23


New technical papers recently added to Semiconductor Engineering’s library. [table id=216 /] Find last week’s technical paper additions here. » read more

Hardware Fuzzer Utilizing LLMs


A new technical paper titled "Beyond Random Inputs: A Novel ML-Based Hardware Fuzzing" was published by researchers at TU Darmstadt and Texas A&M University. Abstract "Modern computing systems heavily rely on hardware as the root of trust. However, their increasing complexity has given rise to security-critical vulnerabilities that cross-layer at-tacks can exploit. Traditional hardware ... » read more

Chip Industry Technical Paper Roundup: Mar. 11


New technical papers added to Semiconductor Engineering’s library this week. [table id=205 /] More ReadingTechnical Paper Library home » read more

Large-Scale Quantum-Processing Architecture Surpassing The Tier of 1000 Atomic Qubits (TU Darmstadt)


A technical paper titled “Supercharged two-dimensional tweezer array with more than 1000 atomic qubits” was published by researchers at Technische Universität Darmstadt (TU Darmstadt). Abstract: "We report on the realization of a large-scale quantum-processing architecture surpassing the tier of 1000 atomic qubits. By tiling multiple microlens-generated tweezer arrays, each operated by a... » read more

Rapid Prototyping For Emerging Semiconductor Devices


A technical paper titled “Generating Predictive Models for Emerging Semiconductor Devices” was published by researchers at TU Darmstadt and NaMLab. Abstract: "Circuit design requires fast and scalable models which are compatible to modern electronic design automation tools. For this task typically analytical compact models are preferred. However, for emerging device concepts with altered ... » read more

Chip Industry’s Technical Paper Roundup: September 26


New technical papers recently added to Semiconductor Engineering’s library: [table id=146 /] More Reading Technical Paper Library home » read more

Chip Industry Week In Review


By Jesse Allen, Karen Heyman, and Liz Allan The U.S. Department of Defense (DOD) announced $238 million in awards toward establishing eight regional innovation hubs under the CHIPS and Science Act. The hubs aim to accelerate hardware prototyping and "lab-to-fab" transition of semiconductor technologies for secure edge/IoT, 5G/6G, AI hardware, quantum technology, electromagnetic warfare, and ... » read more

Framework for Prototyping And In-Hardware Evaluation of Post-Quantum Cryptography HW Accelerators (TU Darmstadt)


A technical paper titled “PQC-HA: A Framework for Prototyping and In-Hardware Evaluation of Post-Quantum Cryptography Hardware Accelerators” was published by researchers at TU Darmstadt. Abstract: "In the third round of the NIST Post-Quantum Cryptography standardization project, the focus is on optimizing software and hardware implementations of candidate schemes. The winning schemes are ... » read more

Power/Performance Bits: Dec. 18


Solar storage Engineers at MIT, Georgia Institute of Technology, and the National Renewable Energy Laboratory designed a system to store renewable energy in vast amounts and deliver it back to the grid when power generation is low. The system stores excess electricity from solar or wind installations as heat using tanks of white-hot molten silicon, and then converts the light from the glowi... » read more