tag: TU Dresden

Chip Industry’s Technical Paper Roundup: Apr. 18
By Linda Christensen - 18 Apr, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=93 /]   If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involv... » read more

Automated Tool Flow From Domain-Specific Languages To Generate Massively Parallel Accelerators on HBM-Equipped FPGAs
By Technical Paper Link - 12 Apr, 2023 - Comments: 0

A new technical paper titled "Automatic Creation of High-bandwidth Memory Architectures from Domain-specific Languages: The Case of Computational Fluid Dynamics" was published by researchers at Politecnico di Milano and TU Dresden. The paper states "In this article, we propose an automated tool flow from a domain-specific language for tensor expressions to generate massively parallel acceler... » read more

New Group Of Non-vdW 2D Materials Derived From Non-Layered Crystals Exhibiting Ultra Low Exfoliation Energies
By Technical Paper Link - 11 Apr, 2023 - Comments: 0

A new technical paper titled "A New Group of 2D Non-van der Waals Materials with Ultra Low Exfoliation Energies" was published by TU Dresden, HZDR, and Aalto University. Abstract: "The exfoliation energy—quantifying the energy required to extract a two-dimensional (2D) sheet from the surface of a bulk material—is a key parameter determining the synthesizability of 2D compounds. Here, ... » read more

Chip Industry’s Technical Paper Roundup: Apr. 4
By Linda Christensen - 04 Apr, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=90 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Characteristics of Three-Gated Reconfigurable FETs
By Technical Paper Link - 03 Apr, 2023 - Comments: 0

A new technical paper titled "Insights into the Temperature Dependent Switching Behaviour of Three-Gated Reconfigurable Field Effect Transistors" was published by researchers at NaMLAB and TU Dresden. "In this work, it is possible to assess the performances of Three-Gated Reconfigurable Field Effect Transistors within a considerable temperature span and finally provide significant insights o... » read more

Week In Review: Design, Low Power
By Linda Christensen - 17 Feb, 2023 - Comments: 0

It’s earnings season. Arm, Cadence, Synopsys, Siemens (consolidated), Rambus, and Renesas reported quarterly results over the past couple weeks. All posted year-over-year revenue growth, despite an overall challenging macroeconomic climate. A roundup of all the chip industry earnings reports from the past several weeks can be found here. The edge computing market is projected to jump to al... » read more

Chip Industry’s Technical Paper Roundup: Feb. 14
By Linda Christensen - 14 Feb, 2023 - Comments: 0

New technical papers recently added to Semiconductor Engineering’s library: [table id=80 /] If you have research papers you are trying to promote, we will review them to see if they are a good fit for our global audience. At a minimum, papers need to be well researched and documented, relevant to the semiconductor ecosystem, and free of marketing bias. There is no cost involved for us p... » read more

Emulation System for Racetrack Memories Based on FPGA
By Technical Paper Link - 13 Feb, 2023 - Comments: 0

A technical paper titled "ERMES: Efficient Racetrack Memory Emulation System based on FPGA" was written by researchers at University of Calabria and TU Dresden. "This paper presents a new emulation system for RTMs based on heterogeneous FPGA-CPU Systems-on-Chips (SoCs). Thanks to its high flexibility, the proposed emulator can be easily configured to evaluate different memory architectures. ... » read more

Ferroelectric Memories: The Middle Ground
By Katherine Derbyshire - 19 Jan, 2023 - Comments: 0

The first article in this series considered the use of ferroelectrics to improve subthreshold swing behavior in logic transistors. The prospects for ferroelectrics in logic applications are uncertain, but ferroelectric memories have clear advantages. The two most common commercial memories lie at opposite ends of a spectrum. DRAM is fast, but requires constant power to maintain its informat... » read more

Chip Industry’s Technical Paper Roundup: Nov. 21
By Linda Christensen - 21 Nov, 2022 - Comments: 0

New technical papers added to Semiconductor Engineering’s library this week. [table id=65 /] » read more

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