LLM inference with limited memory; HW security for 3D ICs; simulation for multi-chip manycore systems; polymorphic logic gate built from reconfigurable FETs; 2D materials in an in-memory processor; fast prototyping for emerging devices; quantum confinement for thermal management; superconducting material with high tunability.
New technical papers added to Semiconductor Engineering’s library this week.
| Technical Paper | Research Organizations |
|---|---|
| LLM in a flash: Efficient Large Language Model Inference with Limited Memory | Apple |
| On hardware security and trust for chiplet-based 2.5D and 3D ICs: Challenges and Innovations | ST-CROLLES, DSCIN, TIMA, and LSTA (France) |
| Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems | Princeton University |
| The RGATE: an 8-in-1 Polymorphic Logic Gate Built from Reconfigurable Field Effect Transistors | TU Dresden and NaMLab |
| A large-scale integrated vector-matrix multiplication processor based on monolayer molybdenum disulfide memories | EPFL |
| Generating Predictive Models for Emerging Semiconductor Devices | TU Darmstadt and NaMLab |
| Enhanced thermoelectric performance via quantum confinement in a metal oxide semiconductor field effect transistor for thermal management | Sandia National Laboratories and Kansas State University |
| Strain-switchable field-induced superconductivity | MIT, U. of Washington, Argonne National Lab., Cornell U., Zhejiang University of Science and Technology, and George Mason U. |
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