Week In Review: Design, Low Power


Tools & IP Cadence uncorked the latest version of JasperGold formal verification platform, providing improvements to the proof-solver algorithm and orchestration by using machine learning to select and parameterize solvers to enable faster first-time proofs and optimize successive runs for regression testing. Additionally, it increases design compilation capacity by over 2x with 50% reduct... » read more

Creating A Roadmap For Hardware Security


The U.S. Department of Defense and private industry consortiums are developing comprehensive and cohesive cybersecurity plans that will serve as blueprints for military, industrial and commercial systems. What is particularly noteworthy in all of these efforts is the focus on semiconductors. While software can be patched, vulnerabilities such as Spectre, Meltdown and Foreshadow need to be de... » read more

IP Requires System Context At 6/5/3nm


Driven by each successive generation of semiconductor manufacturing technology, complexity has reached dizzying levels. Every part of the design, verification and manufacturing is more complicated and intense the more transistors are able to be packed onto a die. For these reasons, the entire system must be taken into consideration as a whole – not just as individual building blocks as could ... » read more

Automotive, AI Drive Big Changes In Test


Design for test is becoming enormously more challenging at advanced nodes and in increasingly heterogeneous designs, where there may be dozens of different processing elements and memories. Historically, test was considered a necessary but rather mundane task. Much has changed over the past year or so. As systemic complexity rises, and as the role of ICs in safety-critical markets continues ... » read more

CDNLive 2019: The Verification Ecosystem Is Growing Stronger And Stronger


Ecosystems are not only fascinating when it comes to processors like Arm, MIPS, x86, and RISC-V (as I have written before) or for semiconductor technologies like TSMC, GLOBALFOUNDRIES, and Samsung; they are key for success in verification as well. CDNLive Silicon Valley was, again, a great example of the verification ecosystem in action. It showcased the different engines verification tools run... » read more

All Security Issues Are Safety Issues


Last month I spoke at the IQPC Safety and Security week event in Munich. It became clear to me that our semiconductor community is really paying attention to these issues now, not just to comply with standards, and not just because of the potential liability – but because it simply makes good business sense. The cost of recalling a single vehicle is estimated to be between $400 and $900 ... » read more

Optimization Challenges For Safety And Security


Complexity challenges long-held assumptions. In the past, the semiconductor industry thought it understood performance/area tradeoffs, but over time it became clear this is not so simple. Measuring performance is no longer an absolute. Power has many dimensions including peak, average, total energy and heat, and power and function are tied together. Design teams are now dealing with the impl... » read more

New Approaches To Security


Different approaches are emerging to identify suspicious behavior and shut down potential breaches before they have a chance to do serious damage. This is becoming particularly important in markets where safety is an issue, and in AI and edge devices where the rapid movement of data is essential. These methods are a significant departure from the traditional way of securing devices through l... » read more

Big Shift In Multi-Core Design


Hardware and software engineers have a long history of working independently of each other, but that insular behavior is changing in emerging areas such as AI, machine learning and automotive as the emphasis shifts to the system level. As these new markets consume more semiconductor content, they are having a big impact on the overall design process. The starting point in many of these desig... » read more

Utilizing More Data To Improve Chip Design


Just about every step of the IC tool flow generates some amount of data. But certain steps generate a mind-boggling amount of data, not all of which is of equal value. The challenge is figuring out what's important for which parts of the design flow. That determines what to extract and loop back to engineers, and when that needs to be done in order to improve the reliability of increasingly com... » read more

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