tag: UMC

Week In Review: Design, Low Power
By Jesse Allen - 16 Jul, 2021 - Comments: 0

Tools Andes Technology certified Imperas reference models for the complete range of Andes IP cores with the new RISC-V P SIMD/DSP extension. The reference models can be used to evaluate multicore design configuration options for SoC architecture exploration and support early software development before silicon prototypes are available. Cadence's digital full flow was optimized and certified... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 16 Jul, 2021 - Comments: 0

Security A new security annotation standard for hardware IP is now available for download at no cost. The board of directors of the Accellera Systems Initiative, the non-profit EDA- and IP-standards organization, approved the release of the Security Annotation for Electronic Design Integration (SA-EDI) Standard 1.0. The standard, developed by Accellera’s IP Security Assurance (IPSA) Working ... » read more

Bumps Vs. Hybrid Bonding For Advanced Packaging
By Mark LaPedus - 23 Jun, 2021 - Comments: 3

Advanced packaging continues to gain steam, but now customers must decide whether to design their next high-end packages using existing interconnect schemes or move to a next-generation, higher-density technology called copper hybrid bonding. The decision is far from simple, and in some cases both technologies may be used. Each technology adds new capabilities in next-generation advanced pac... » read more

Fan-Out Packaging Options Grow
By Mark LaPedus - 17 Jun, 2021 - Comments: 0

Chipmakers, OSATs and R&D organizations are developing the next wave of fan-out packages for a range of applications, but sorting out the new options and finding the right solution is proving to be a challenge. Fan-out is a way to assemble one or more dies in an advanced package, enabling chips with better performance and more I/Os for applications like computing, IoT, networking and sma... » read more

Replacement Gate High-k/Metal Gate nMOSFETs Using A Self-Aligned Halo-Compensated Channel Implant
By UMC - 16 Jun, 2021 - Comments: 0

A device design technique for boosting output resistance (Rout) characteristics of long-channel halo-doped nMOSFETs for replacement gate (RMG) high-k/metal gate (HK/MG) devices is proposed based on numerical simulations. We show that the self-aligned halo-compensated channel implant (HCCI) that is carried out after dummy poly gate removal provides compensation for the conventional halo doping. ... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 04 Jun, 2021 - Comments: 0

Government policy The Malaysian government has extended its lockdown due to the pandemic until June 14, a move that may impact the global electronics supply chain, according to TrendForce. Malaysia recently implemented MCO 3.0 (Movement Control Order), the nation’s pandemic control measure. Malaysia is home to many fab equipment, packaging and testing facilities, as well as passive compon... » read more

Week In Review: Auto, Security, Pervasive Computing
By Susan Rambo - 04 Jun, 2021 - Comments: 0

Pervasive computing — IoT, edge, cloud, data center, and back To simplify IoT workflows, Arm announced that it is putting parts of its Common Microcontroller Software Interface Standard (CMSIS) into an open project called Open-CMSIS-Pack. The CMSIS is a vendor-independent abstraction layer for MCUs, especially Arm Cortex-M processors, that makes it possible for developers to deal with softwa... » read more

Week In Review: Manufacturing, Test
By Mark LaPedus - 28 May, 2021 - Comments: 0

Government policy The U.S. government hopes to build more fabs and expand its R&D efforts in the United States. To help enable those efforts, U.S. Senate Majority Leader Charles Schumer has introduced the new bipartisan U.S. Innovation and Competition Act. This combines Schumer’s Endless Frontier Act and other bipartisan competitiveness bills. It includes $52 billion in emergency supplem... » read more

The Increasingly Uneven Race To 3nm/2nm
By Mark LaPedus and Ed Sperling - 24 May, 2021 - Comments: 2

Several chipmakers and fabless design houses are racing against each other to develop processes and chips at the next logic nodes in 3nm and 2nm, but putting these technologies into mass production is proving both expensive and difficult. It's also beginning to raise questions about just how quickly those new nodes will be needed and why. Migrating to the next nodes does boost performance an... » read more

Demand, Lead Times Soar For 300mm Equipment
By Mark LaPedus - 20 May, 2021 - Comments: 0

A surge in demand for various chips is causing select shortages and extended lead times for many types of 300mm semiconductor equipment, photomask tools, wafers, and other products. For the last several years, 200mm equipment has been in short supply in the market, but issues are now cropping up throughout the 300mm supply chain, as well. Traditionally, lead times have been three to six mont... » read more

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