Chip Industry Technical Paper Roundup: Jan. 23


New technical papers added to Semiconductor Engineering’s library this week. [table id=189 /] More ReadingTechnical Paper Library home » read more

Novel Neuromorphic Artificial Neural Network Circuit Architecture


A technical paper titled “Mosaic: in-memory computing and routing for small-world spike-based neuromorphic systems” was published by researchers at CEA-LETI Université Grenoble Alpes, University of Zurich and ETH Zurich. Abstract: "The brain’s connectivity is locally dense and globally sparse, forming a small-world graph—a principle prevalent in the evolution of various species, sugg... » read more

Week In Review: Auto, Security, Pervasive Computing


Intel issued an advisory of a potential security vulnerability in some of its processors. The company recommends updating to the latest firmware version. NVIDIA unveiled its GH200 Grace Hopper platform, based on 144 Arm Neoverse cores and 282GB of HBM3e memory. Meanwhile, Chinese internet companies including Baidu, ByteDance, Tencent, and Alibaba ordered about $5 billion worth of A800 proces... » read more

Chip Industry’s Technical Paper Roundup: August 9


New technical papers recently added to Semiconductor Engineering’s library: [table id=124 /] More Reading Technical Paper Library home » read more

Analog Circuits Enabling Learning in Mixed-Signal Neuromorphic SNNs, With Tristate Stability and Weight Discretization Circuits


A technical paper titled “Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networks” was published by researchers at University of Zurich and ETH Zurich. Abstract: "Mixed-signal neuromorphic systems represent a promising solution for solving extreme-edge computing tasks without relying on external computing resources. Their spiking neural network circui... » read more

Chip Industry’s Technical Paper Roundup: July 24


New technical papers recently added to Semiconductor Engineering’s library: [table id=119 /] More Reading Technical Paper Library home » read more

Analog On-Chip Learning Circuits In Mixed-Signal Neuromorphic SNNs


A technical paper titled "Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networks" was published by researchers at Institute of Neuroinformatics, University of Zurich, and ETH Zurich. Abstract: "Mixed-signal neuromorphic systems represent a promising solution for solving extreme-edge computing tasks without relying on external computing resources. Their s... » read more

Chip Industry’s Technical Paper Roundup: Oct. 4


New technical papers added to Semiconductor Engineering’s library this week. [table id=55 /] Semiconductor Engineering is in the process of building this library of research papers. Please send suggestions (via comments section below) for what else you’d like us to incorporate. If you have research papers you are trying to promote, we will review them to see if they are a good fit for... » read more

Adaptive Memristive Hardware


A new technical paper titled "Self-organization of an inhomogeneous memristive hardware for sequence learning" was just published by researchers at University of Zurich, ETH Zurich, Université Grenoble Alpes, CEA, Leti and Toshiba. "We design and experimentally demonstrate an adaptive hardware architecture Memristive Self-organizing Spiking Recurrent Neural Network (MEMSORN). MEMSORN incorp... » read more

Research Bits: Sept. 20


Multi-mode memristors Researchers from ETH Zurich, the University of Zurich, and Empa built a new memristor that can operate in multiple modes and could potentially be used to mimic neurons in more applications. “There are different operation modes for memristors, and it is advantageous to be able to use all these modes depending on an artificial neural network’s architecture,” said R... » read more

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