tag: UVM

The Week In Review: Design/IoT
By Jesse Allen - 31 Jul, 2015 - Comments: 0

M&A ARM acquired Israel-based Sansa Security, a provider of hardware security IP and software for advanced system-on-chip components deployed in IoT and mobile devices. The company's technology is currently deployed across a range of smart connected devices and enterprise systems. Sansa IP will be integrated into ARM's TrustZone and IoT portfolios. Standards Accellera sent UVM 1.2 ... » read more

IP Verification Challenges
By Brian Bailey - 30 Jul, 2015 - Comments: 0

At the Design Automation Conference this year, the Designer and IP tracks were the stars of the show in many ways. These sessions catered to industry rather than academia and provided engineers with information they could directly use in their jobs. Many of the sessions were filled to capacity and Anne Cirkel, general chair for the 52nd DAC, was enthusiastic about the growing success of these t... » read more

UVM: What’s Stopping You?
By Doug Amos - 02 Jul, 2015 - Comments: 0

These days, verification of the most complex designs is performed using a standard verification methodology, probably SystemVerilog-based [gettech id="31055" comment="UVM"]. Many verification teams have ramped up on UVM, but others have yet to take the plunge. Why is that? And how big a “plunge” is it, anyway? If UVM is as great as all that, then why hasn’t everybody adopted it already... » read more

EDA’s Clouded Future
By Brian Bailey - 25 Jun, 2015 - Comments: 0

There was a time, not that long ago, when chip design and EDA tools consumed some of the largest data centers with tens of thousands of machines and single datasets that consumed more than a hard disk could hold. The existing IT capabilities of the times were stretched to their limits. But while design sizes grew, other aspects of the flow did not develop as fast. “This has been driven by ... » read more

Analog’s Day Of Reckoning
By Brian Bailey - 16 Jun, 2015 - Comments: 0

The numbers being touted by the semiconductor industry for IoT edge devices are staggering. How they are going to be used, who will make them, or indeed who will make money from them are much less certain. The industry seems to be clear about the content of these devices. A small processor, some flash memory or possibly even some of the new memory technologies that are coming along, a radio ... » read more

Layering Protocol Verification
By Synopsys - 22 Apr, 2015 - Comments: 0

Layering protocols are modeled using layering structures that mirror the protocol layers. There are significant challenges in modelling verification components for layering protocols such as (1) reuse, (2) scalability, (3) controllability, and (4)observability. Furthermore, there may be requirements for complex test scenarios where a great deal of interaction is required between test sequence e... » read more

The Week In Review: Design/IoT
By Jesse Allen - 06 Mar, 2015 - Comments: 0

Mergers & Acqusitions Mentor Graphics acquired Tanner EDA, bolstering their position in tools for analog, mixed-signal and MEMs. Terms of the deal were not disclosed. NXP joins forces with Freescale. The merger carries a $16.7 billion price tag and potentially creates a new leader in the automotive and MCU markets. Standards Accellera sent UVM 1.2 off to the IEEE P1800.2 working... » read more

Blog Review: Jan. 7
By Ed Sperling - 07 Jan, 2015 - Comments: 0

Ansys' Justin Nescott has extracted the top 5 engineering technology articles for 2014. Check out the turbocharged Dyson hand vac and the suspended animation trials. Mentor's J. VanDomelen looks at on-demand additive manufacturing on the International Space Station, otherwise known as 3D modeling and printing. It's a lot faster than waiting for a delivery. Cadence's Brian Fuller sits dow... » read more

Industry Scorecard For 2014
By Brian Bailey - 22 Dec, 2014 - Comments: 0

At the end of last year, Semiconductor Engineering asked the industry about the developments they expected to see in 2014. If you care to refresh your memory, they were categorized under markets, semiconductors and development tools. Now it is time to look back and see how accurate those predictions were and where they fell short. Part one addressed the market and semiconductor areas and in thi... » read more

Top-Down SoC Verification
By Frank Schirrmeister - 18 Dec, 2014 - Comments: 0

In the world of system-on-chip (SoC) verification, 2014 was an interesting year of transition. After much discussion throughout the year about graph-based techniques and the role of software for verification, we at Cadence ended the year with a bang – last week we announced Perspec System Verifier. The customers with whom we’ve been working on this product for years tell us that this is a b... » read more

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