Learning How To Forget


There has been a lot of talk recently about the right to be forgotten, or data privacy rights. These require companies that hold data about us to remove it when properly requested. This might be data that was collected as we browse the Internet, or from online shopping. Or perhaps it's collected as we drive our cars past cameras, or GPS tracking of our cellphones, or many other ways – some of... » read more

Verification Scorecard: How Well Is The Industry Doing?


Semiconductor Engineering sat down to discuss how well verification tools and methodologies have been keeping up with demand, with Larry Lapides, vice president of sales for Imperas Software; Mike Thompson, director of engineering for the verification task group at OpenHW; Paul Graykowski, technical marketing manager for Arteris IP; Shantanu Ganguly, vice president of product marketing at Caden... » read more

Is There A Limit To The Number of Layers In 3D-NAND?


Memory vendors are racing to add more layers to 3D NAND, a competitive market driven by the explosion in data and the need for higher-capacity solid state drives and faster access time. Micron already is filling orders for 232-layer NAND, and not to be outdone, SK Hynix announced that it will begin volume manufacturing 238-layer 512Gb triple level cell (TLC) 4D NAND in the first half of next... » read more

Formal Verification Methodology For Detecting Security-Critical Bugs in HW & in the HW/Firmware Interface of SoCs (Award Winner)


A new technical paper titled "A Formal Approach to Confidentiality Verification in SoCs at the Register Transfer Level" was this year's first place winner of Intel's Hardware Security Academic Award program.   The approach utilizes UPEC (Unique Program Execution Checking) to identify functional design bugs causing confidentiality violations, covering both the processor and its peripherals. ... » read more

Verifying A DDR5 Memory Subsystem


With the increasing complexity of DDR memory models and a vast set of configurations, it has become a daunting experience for verification engineers to verify memory subsystems. With the help of DDR5 Questa VIP and its unique features, engineers can maximize their debugging capabilities and achieve their verification goals quickly and efficiently. This paper introduces the Siemens EDA DDR5 and ... » read more

Using ML Methods In Production-Ready Engineering Solutions For IC Verification


By WeiLii Tan & Jeff Dyck Semiconductor designs continue to push the envelope of performance, functionality, and efficiency while their application scope expands in high-performance computing, automotive solutions, and IoT devices. The increased design complexity, scale, and mission-critical operations of semiconductor designs mean that IC verification strategies must evolve to cover expon... » read more

2.5/3D IC Reliability Verification Has Come A Long Way


2.5D/3D integrated circuits (ICs) have evolved into an innovative solution for many IC design and integration challenges. As shown in figure 1, 2.5D ICs have multiple dies placed side-by-side on a passive silicon interposer. The interposer is placed on a ball grid array (BGA) organic substrate. Micro-bumps attach each die to the interposer, and flip-chip (C4) bumps attach the interposer to the ... » read more

ML And UVM Share Same Flaws


A number of people must be scratching their heads over what UVM and machine learning (ML) have in common, such that they can be described as having the same flaws. In both cases, it is a flaw of omission in some sense. Let's start with ML, and in particular, object recognition. A decade ago, Alexnet, coupled with GPUs, managed to beat all of the object detection systems that relied on tradit... » read more

Customizing Processors


The design, verification, and implementation of a processor is the core competence of some companies, but others just want to whip up a small processor as quickly and cheaply as possible. What tools and options exist? Processors range from very small, simple cores that are deeply embedded into products to those operating at the highest possible clock speeds and throughputs in data centers. I... » read more

The Reliability Of Analog Integrated Circuits And Their Simulation-Aided Verification


Different challenges have to be overcome when designing integrated circuits. Besides schematic and layout design work, verification in view of the non-ideal behavior of circuits and semiconductor technologies in particular is also relevant. The designed circuits have to work at specific operating voltages and within ambient temperature ranges and be robust in terms of process fluctuations ... » read more

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