tag: verification

Multicore Debug Evolves To The System-Level
By Ann Mutschler - 22 Dec, 2020 - Comments: 0

The proliferation and expansion of multicore architectures is making debug much more difficult and time-consuming, which in turn is increasing demand for more comprehensive system-level tools and approaches. Multicore/multiprocessor designs are the most complex devices to debug. More interactions and interdependencies between cores mean more things possibly can go wrong. In fact, so many pro... » read more

Evaluate ESD Robustness With Cell-Based P2P/CD Verification
By Mentor, a Siemens Business - 21 Dec, 2020 - Comments: 0

Detecting and verifying an ESD structure can be challenging for designers without specialized ESD experience. The Calibre PERC reliability platform offers cell-based P2P and CD checks that can be used to quickly, accurately, and easily evaluate ESD robustness without the need for advanced ESD expertise. To read more, click here. » read more

An Integrated Approach To Power Domain And Clock Domain Crossing Verification
By Mentor, a Siemens Business - 09 Dec, 2020 - Comments: 0

Reducing power consumption is essential for both mobile and data center applications. The challenge is to lower power while minimally impacting performance. The solution has been to partition designs into multiple power domains which allow selectively reducing voltage levels or powering off partitions. Traditional low power verification validates only the functional correctness of power control... » read more

Verification Convergence: Problem Definition
By Hagai Arbel - 30 Nov, 2020 - Comments: 0

A while ago, I had to go to the ER with my friend who suddenly had a numb feeling in his face. He felt okay (and everything else is okay with him), but better be safe than sorry. While the doctor examined him I noticed that before tracing the problem itself, she asked some questions to rule-out a problem she was already familiar with and that can manifest itself in similar ways. Only then, a... » read more

Silo Busting In The Design Flow
By Brian Bailey - 24 Nov, 2020 - Comments: 0

An increasing number of dependencies in system design are forcing companies, people, tools, and flows to become more collaborative. Design and EDA companies must adapt to this new reality because it has become impossible for anyone to do it all by themselves. Moreover, what happens in manufacturing and packaging needs to be considered up front, and what gets designed in the design phase may ... » read more

Using AI And Bugs To Find Other Bugs
By Ann Mutschler - 24 Nov, 2020 - Comments: 0

Debug is starting to be rethought and retooled as chips become more complex and more tightly integrated into packages or other systems, particularly in safety- and mission-critical applications where life expectancy is significantly longer. Today, the predominant bug-finding approaches use the ubiquitous constrained random/coverage driven verification technology, or formal verification techn... » read more

ESD P2P And CD Verification Doesn’t Have To Be Hard
By Abdellah Bakhali - 24 Nov, 2020 - Comments: 0

As a designer or verification engineer, you’re fighting the effects of electrostatic discharge (ESD) in your integrated circuit (IC) designs all the time. ESD is one of those frustrating issues that can challenge even the most experienced designers. Once an IC is in the market, unexpected electrical shorts will cause immediate failure or dielectric breakdown will result in gradual circuit deg... » read more

HDL Simulation Acceleration Solution For Microchip FPGA Designs
By Aldec - 23 Nov, 2020 - Comments: 0

Mission-critical FPGA designs for space and radar applications continue to increase in complexity, such that they require a comprehensive and robust verification environment. There are hardware-in-the-loop solutions in the market that utilize FPGA boards, but when it comes to establishing functional coverage and debugging the custom logic, users would typically need to go back to HDL simulation... » read more

Growing Complexity Adds To Auto IC Safety Challenges
By Ann Mutschler - 05 Nov, 2020 - Comments: 0

The automotive industry is working to streamline, automate and tame verification of automotive electronic control units, SoCs and other chips used in vehicles, many of which are becoming so complex and intertwined that progress is getting bogged down. Modern cars may have up to 100 ECUs, which control such vehicle functions as engine, powertrain, transmission, brakes, suspension, entertainme... » read more

A Machine Learning-Based Approach To Formality Equivalence Checking
By Avinash Palepu - 29 Oct, 2020 - Comments: 0

By Avinash Palepu, Namrata Shekhar and Paula Neeley After a long and hard week, it is Friday night and you are ready to relax and unwind with a glass of wine, a sumptuous dinner and a great movie. You turn on Netflix and you expect that it will not only have plenty of pertinent suggestions for you, but also the most appropriate one based on all the previous movies and shows that you have wat... » read more

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