Experts At The Table: The Reliability Factor

By Ed Sperling - 28 Jan, 2010 - Comments: 0

Low-Power Engineering sat down to discuss reliability with Ken O’Neill, director of high reliability product marketing at Actel; Brani Buric, executive vice president at Virage Logic; Bob Smith, vice president of marketing at Magma, and John Sanguinetti, chief technology officer at Forte Design Systems. What follows are excerpts of that conversation. LPE: Is a more complex supply chain cau... » read more

Experts At The Table: The Reliability Factor

By Ed Sperling - 22 Jan, 2010 - Comments: 0

Low-Power Engineering sat down to discuss reliability with Ken O’Neill, director of high-reliability product marketing at Actel; Brani Buric, executive vice president at Virage Logic; Bob Smith, vice president of marketing at Magma, and John Sanguinetti, chief technology officer at Forte Design Systems. What follows are excerpts of that conversation. LPE: As we push to the next process nod... » read more

Experts At The Table: The Reliability Factor

By Ed Sperling - 04 Jan, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering sat down to discuss reliability with Ken O’Neill, director of high reliability product marketing at Actel; Brani Buric, executive vice president at Virage Logic; Bob Smith, vice president of marketing at Magma, and John Sanguinetti, chief technology officer at Forte Design Systems. What follows are excerpts of that conversation. LPE: Do chips become ... » read more

Differentiating Embedded Processors

By Ed Sperling - 10 Dec, 2009 - Comments: 0

By Ann Steffora Mutschler The embedded processor world addresses a vast range of applications – from the datacenter to the biomedical device – all of which have critical power needs that vary with the use. Power concerns continue to dominate the embedded system whether it is avoid a noisy fan in a TV set-top box, allow video on a mobile phone or minimize pricey cooling costs in the datac... » read more

Meeting The Challenge Of Verification In Low-Power Designs

By Ed Sperling - 12 Nov, 2009 - Comments: 0

By Cheryl Ajluni Over the years, new techniques, technologies and design tools have been brought to market with the explicit intent of simplifying design verification. Despite these efforts verification still manages to consume a huge chunk of the time spent during design. By some accounts that number tops 70%. The problem is that verification is hard, and it certainly doesn’t get an easi... » read more

New Business Models Emerge

By Ed Sperling - 24 Sep, 2009 - Comments: 0

By Ed Sperling Globalization, complexity and the rising cost of chip development are changing business models across the semiconductor design world in some expected as well as some unusual ways. On a global basis, each new process node propels a new wave of disaggregation and disruption as the costs of design continue to skyrocket. What used to be under one roof is now shared by many. This ... » read more

When It Comes To Intellectual Property, Size Matters

By Various Writers - 19 Aug, 2009 - Comments: 0

By Geoffrey James Intellectual property was once seen as the new growth market for EDA. Dozens of firms – large and small – jumped on the IP bandwagon, attracted to the “build once, sell many times” business model. “As late as 2004, the industry was still thinking that as much as 90% of SoCs would be reused IP,” said EDA consultant Gary Smith. The IP segment, however, hasn�... » read more

Experts At The Table: ESL And Low Power

By Ed Sperling - 07 Aug, 2009 - Comments: 0

Low-Power Design sat down with Walter Ng, senior director of platform alliances at Chartered Semiconductor; Brani Buric, executive vice president of sales and marketing at Virage Logic; John Sanguinetti, CTO at Forte Design Systems and Andrea Kroll vice president of marketing and business development at JEDA Technologies. What follows are excerpts of that discussion. By Ed Sperling LPD: H... » read more

Experts At The Table: ESL And Low Power

By Ed Sperling - 24 Jul, 2009 - Comments: 0

Experts At The Table: ESL And Low Power

By Ed Sperling - 16 Jul, 2009 - Comments: 0

By Ed Sperling Low-Power Design sat down with Walter Ng, senior director of platform alliances at Chartered Semiconductor; Brani Buric, executive vice president of sales and marketing at Virage Logic; John Sanguinetti, CTO at Forte Design Systems and Andrea Kroll vice president of marketing and business development at JEDA Technologies. What follows are excerpts of that discussion. ... » read more

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Experts At The Table: The Reliability Factor

Experts At The Table: The Reliability Factor

Experts At The Table: The Reliability Factor

Differentiating Embedded Processors

Meeting The Challenge Of Verification In Low-Power Designs

New Business Models Emerge

When It Comes To Intellectual Property, Size Matters

Experts At The Table: ESL And Low Power

Experts At The Table: ESL And Low Power

Experts At The Table: ESL And Low Power

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