Week In Review: Manufacturing, Test


SPIE At the SPIE Advanced Lithography conference, Lam Research has introduced a new dry resist technology for extreme ultraviolet (EUV) lithography. Dry resist technology is a new approach to deposit and develop EUV resists. It is a dry deposition technique with alternate compositions and mechanisms. By combining Lam’s deposition and etch process expertise with partnerships with ASML a... » read more

Week In Review: Manufacturing, Test


Chipmakers and OEMs IC Insights has released its rankings of the 25 largest wafer capacity leaders in terms of monthly installed capacity in 200mm-equivalents as of December 2019. Samsung was in first place, followed by TSMC, Micron, SK Hynix, and Kioxia, formerly Toshiba Memory, according to IC Insights. Combined capacity of the top five companies represented 53% of total global wafer capa... » read more

Week In Review: Manufacturing, Test


Fab tools and materials In a blog, David Haynes, managing director of strategic marketing at Lam Research, talks about the IoT and automotive chip markets, which are fabricated at a wide range of technology nodes. Hoya recently made an unsolicited $1.4 billion bid to acquire NuFlare, a supplier of e-beam mask writers and other equipment. Click here for more information. Hoya makes several p... » read more

What’s Next For High Bandwidth Memory


A surge in data is driving the need for new IC package types with more and faster memory in high-end systems. But there are a multitude of challenges on the memory, packaging and other fronts. In systems, for example, data moves back and forth between the processor and DRAM, which is the main memory for most chips. But at times this exchange causes latency and power consumption, sometimes re... » read more

What’s The Best Advanced Packaging Option?


As traditional chip designs become more unwieldy and expensive at each node, many IC vendors are exploring or pursuing alternative approaches using advanced packaging. The problem is there are too many advanced packaging options on the table already, and the list continues to grow. Moreover, each option has several tradeoffs and challenges, and all of them are still relatively expensive. ... » read more

The Race To Next-Gen 2.5D/3D Packages


Several companies are racing each other to develop a new class of 2.5D and 3D packages based on various next-generation interconnect technologies. Intel, TSMC and others are exploring or developing future packages based on one emerging interconnect scheme, called copper-to-copper hybrid bonding. This technology provides a way to stack advanced dies using copper connections at the chip level,... » read more

Blog Review: Aug. 29


Mentor's Joe Hupcey III addresses inconclusive results in formal verification with tips on how to reduce the complexity of “assumption” properties to make them easier for the formal engines to digest and reach a solution. Cadence's Meera Collier looks beyond the immediate appeal of autonomous cars to the broader social implications of urban sprawl, public transit funding, and gentrificat... » read more

Week In Review: Manufacturing, Test


Trade wars After opposing $34 billion in U.S. trade tariffs on behalf of the U.S. semiconductor manufacturing industry, Jonathan Davis, global vice president of industry advocacy at SEMI, recently spoke out against an additional $16 billion in duties on Chinese goods. The tariffs do little to address U.S. concerns over IP loss, according to SEMI. Over the past month, SEMI has also submitte... » read more

The Week In Review: Manufacturing


Chipmakers Recently, Intel announced plans to invest more than $7 billion to complete its previously-announced fab in Chandler, Ariz. Targeted for 7nm processes, Fab 42 will be completed in 3 to 4 years. As reported, the fab announcement was made by U.S. President Donald Trump and Intel CEO Brian Krzanich at the White House. There is more to the story. Typically, Intel has two fabs for a gi... » read more