A new technical paper titled “Multiscale Simulation and Machine Learning Facilitated Design of Two-Dimensional Nanomaterials-Based Tunnel Field-Effect Transistors: A Review” was published by researchers at University of Chicago and Argonne National Lab.
Abstract
“Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transistors (MOSFETs) are facing significant limitations as device scaling reaches the limits of Moore’s Law. These limitations include increased leakage currents, pronounced short-channel effects (SCEs), and quantum tunneling through the gate oxide, leading to higher power consumption and deviations from ideal behavior. Tunnel Field-Effect Transistors (TFETs) can overcome these challenges by utilizing quantum tunneling of charge carriers to switch between on and off states and achieve a subthreshold swing (SS) below 60 mV/decade. This allows for lower power consumption, continued scaling, and improved performance in low-power applications. This review focuses on the design and operation of TFETs, emphasizing the optimization of device performance through material selection and advanced simulation techniques. The discussion will specifically address the use of two-dimensional (2D) materials in TFET design and explore simulation methods ranging from multi-scale (MS) approaches to machine learning (ML)-driven optimization.”
Find the technical paper here. Preprint September 2024.
Tsang, Chloe Isabella, Haihui Pu, and Junhong Chen. “Multiscale Simulation and Machine Learning Facilitated Design of Two-Dimensional Nanomaterials-Based Tunnel Field-Effect Transistors: A Review.” arXiv preprint arXiv:2409.18965 (2024).
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