The Week In Review: Design

Open-Silicon unveils SerDes evaluation platform; Synopsys swaps IP with AMD, hires AMD IP R&D team; Mentor inks silicon photonics design deal with Lumerical.

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Tools
Open-Silicon uncorked a 28Gbps SerDes evaluation platform, complete with board, test chip and characterization data, which it says will speed up and simplify development of chips for 100G networks. The chip utilizes PHY IP from Semtech.

IP
Synopsys rolled out MIPI C-PHY verification IP that utilizes a three-phase coding technique for faster camera, display and SoC interfaces. http://news.synopsys.com/2014-09-17-Synopsys-New-MIPI-C-PHY-Verification-IP-Accelerates-Adoption-of-MIPI-Alliances-Physical-Layer-Specifications The company also introduced new MIPI D-PHY, which it says reduces area and power by 50%.

Deals
AMD expanded its arrangement with Synopsys, providing AMD access to a wide range of Synopsys IP while Synopsys gains rights to AMD’s interface and foundation IP. As part of the deal, Synopsys hired a team of AMD engineers with expertise in IP R&D.

Mentor Graphics took a big step toward enabling silicon photonics, signing a deal with Canada’s Lumerical Solutions. Under terms of the deal, Lumerical’s design environment for analyzing integrated optical circuits, silicon photonics components and optical interconnects will be integrated with Mentor’s simulation flow.

China’s Leadcore Technology, part of the Datang Telecom Technology and Industry Group, said it achieved first-pass silicon with Synopsys’ MIPI IP in a smartphone SoC. The company said it integrated the IP within two weeks with the help of Synopsys technical experts.

Cavium standardized on Synopsys place and route tool for high-performance SoC designs. And Germany’s Elmos Semiconductor inked a deal to use Synopsys’ custom and digital tools for layout, place and route, extraction, physical verification and mixed signal verification.