The Week In Review: Design

Mentor unveils X verification platform; Jasper rolls out sequential equivalence checking for RTL; SIA releases new ITRS roadmap; Gartner says chip market hit $315B in 2013.


Mentor Graphics rolled out a new platform for verification of unknown voltage levels (Xs) at the register transfer and gate levels, fusing together simulation and formal verification under one umbrella. The company says the approach will limit bugs and wasted effort caused by X-optimism and pessimism.

Jasper Design Automation unveiled a new tool to verify the sequential functional equivalence of RTL implementations. The problem being addressed, according to Jasper, is that changes are made to RTL that frequently are not purely functional such as low-power optimization or engineering change orders, but comparing different RTL versions can take weeks for every change and still not necessarily be accurate. The new application greatly reduces the time it takes to make those comparisons.

The Semiconductor Industry Association this week released its newest (2013) International Technology Roadmap for Semiconductors. The ITRS determined that 3D-ICs and low power will open up a new era of scaling, this one using multiple layers of transistors. It also cited progress in carbon nanotubes and graphene, which it said could emerge in the next decade for a variety of purposes.

Gartner said that semiconductor revenue grew 5% to $315 billion in 2013 compared with 2012, while the combined revenue of the top 25 chip vendors increased 6.9%. The order of the top three remained the same—Intel with 15.4%, Samsung with 9.7%, and Qualcomm with 5.5%. The memory market, meanwhile, grew 23.5% year over year.

The White House Office of Science and Technology Policy is looking for public input on ways to share the 65MHz wireless spectrum. The Obama administration is looking to repurpose 500MHz of spectrum for wireless broadband.

Leave a Reply

(Note: This name will be displayed publicly)