The Week In Review: Design

Tools

Cadence launched its Sigrity 2017 technology portfolio for PCB power and signal integrity signoff, adding a power topology viewer and editor, library management for power integrity models, and a PCI Express 4.0 compliance kit for checking signal integrity.

Memory

Spin Transfer Technologies delivered samples of fully functional ST-MRAM (spin transfer magneto-resistive random access memory) devices to multiple customers. The sample devices utilize 80nm perpendicular magnetic tunnel junctions (MTJs) and are initially targeted for embedded non-volatile memory applications.

Deals

Sonics teamed up with GlobalFoundries on energy processing unit (EPU) product development for 22FDX process technologies. Sonics will develop an extension of its EPU product line which supports GlobalFoundries’ body-biasing library components with the aim of raising the level of abstraction for SoC power control.

FlexLogix will be working with DARPA to develop Flex Logix’s embedded FPGA technology for use by companies designing ICs for the US Government. The arrays will be available in the TSMC 16FFC process node from 2.5K to 122.5K LUTs so companies and agencies can reconfigure RTL at any point during the design process.

Events

The International Workshop on Logic and Synthesis, co-located with DAC, is calling for papers related to research in synthesis, optimization, and verification of integrated circuits and systems. Submissions on modeling, analysis and synthesis for emerging technologies and platforms are particularly encouraged. Abstracts are due March 5, 2017, and full papers by March 12, 2017.

The Heterogeneous System Architecture Foundation (HSA) and AMD will present a half-day tutorial on the latest developments in hardware and software for heterogeneous compute at the International Symposium on Code Generation and Optimization (CGO). The conference will be held from Feb. 4-8 in Austin, TX. The tutorial will be held Feb. 5.

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