Using Process Modeling To Enhance Device Uniformity During Self-Aligned Quadruple Patterning

Despite the growing interest in EUV lithography, self-aligned quadruple patterning (SAQP) still holds many technical advantages in pattern consistency, simplicity, and cost. This is particularly true for very simple and periodic patterns, such as line & space patterns or hole arrays. The biggest challenge of SAQP is the inherently asymmetric mask shape. This asymmetry can create structural non-uniformity during the etch process, due to complex etch rate variability created by angular dependent etch effects. These challenges are further compounded when serial SAQP processes need to be overlaid upon each another, such as when it is necessary to create cross points or holes formed in a grid-like pattern. In this article, we will discuss using SEMulator3D process modeling to identify an ALD thickness that minimizes this type of pattern offset and device non-uniformity.

Structure

We first developed a virtual device structure to test how ALD thickness affects hole size uniformity and CD. We started our virtual experiment by using two crisscross SAQP processes and transferring a hole grid pattern onto a SiO2 layer. The starting stack contains the 60nm SiO2 mask, a 20 nm SiN mask (figure 1a), and the first SAQP layer Si 60nm / carbon 60nm / SiARC (25nm) / Photoresist (PR) 80 nm. After the final set of SAQP masks is formed (figure 1b), the entire device is buried in carbon and another SAQP layer is deposited, this time in the perpendicular direction (figure 1c). After the upper SAQP layer is formed, an etch is performed to remove the buried carbon material, and then finally the SiN and SiO2 layers underneath are etched. All etch processes use an angular dependent etch simulation tool built into SEMulator3D. An angular distribution input parameter in the etch model was identified by using actual SEM etch data. For the SAQP mask etch, a slight constant etch rate sputtering effect was also included in the process model to account for the slanted nature of the etch. All deposition steps, including atomic layer deposition, are reproduced using a conformal deposition feature found in SEMulator3D.

Challenges

The greatest challenge in implementing an SAQP scheme is to minimize pitch walking, which creates non-uniform mask spacing due to asymmetric etching. When two SAQP masks are overlaid to create a grid pattern, the effects of pitch walking can manifest itself as hole CD nonuniformity and hole positioning offset from the desired spacing (see figure 2). This pitch walking can be alleviated by adjusting the ALD spacer thickness. ALD deposition is fortunately chemically self-limiting, and it is a consistently controlled process that can be very accurately modeled in a process model. The SAQP process flow involves two ALD processes, one on the carbon mandrel (denoted by ALD 1 thickness) and a second one on a silicon mandrel (denoted by ALD 2 thickness). In this virtual experiment, both top and bottom SAQP processes used the same ALD 1 and ALD 2 thicknesses.

Results

Figure 3a shows a contact area standard deviation heat map of Monte Carlo simulation results in SEMulator3D. The results were obtained by varying ALD thickness within a broad range. In figure 3b, we looked at the results within a narrower ALD thickness range that had low standard deviation. In the broad range Monte Carlo heat map (figure 3a), a region of small contact area standard deviation of less than 80 nm^2 can be found in the area of an ALD 1 thickness of 16nm and an ALD 2 thickness in the 14nm range (figure 3b). A second Monte Carlo simulation was then performed using a smaller range for ALD 1 and ALD 2 thicknesses, centered at approximately the lowest variation region shown in figure 3a. From these results, we obtained a minimum hole standard deviation of 60 when ALD 1 thickness was 16.9935 nm and ALD 2 thickness was 13.537 nm.

Further improvements may be achieved by varying the thickness between the top and bottom SAQP processes. In figure 4, we have displayed the step-by-step 3D process model that uses the optimized ALD thickness and compared this to the process results using the base default thickness. A significant improvement in hole size uniformity was achieved by optimizing the ALD thicknesses. This study demonstrates that hole CD uniformity can be improved in an SAQP process through simulation and control of ALD thickness. These results can be applied to improving patterning yield in many critical semiconductor device manufacturing applications.