Virtual Prototyping For Power Electronics Systems

Using piecewise linear circuit models rather than models with full SPICE-level accuracy to perform earlier simulation.


By Alan Courtay and Gobi Kengara Palayam Appavoo

Every day, power electronics systems play a bigger role in our lives. All-electric and hybrid vehicles are now common on our streets. Electrification of the aerospace industry is accelerating, and observers expect hybrid and electric aircraft to make an impact over the next decade or two. Many industrial systems rely increasingly on electronics and power control. Power generation, especially from renewable sources, requires sophisticated control systems to connect safely to the grid. All battery-powered consumer products, including smartphones, tablets and laptops, must make the best possible use of their limited energy capacity. Power management in these products is quite sophisticated, and literally a matter of life and death for implanted medical devices.

The many diverse applications for electric power have dramatically different requirements and, even within a single system, different subsystems often need power in different forms. A power electronics interface provides the necessary level of control. Many power electronics systems include complex semiconductor devices that must be well verified before committing to the long and expensive chip fabrication process. The historical method of building a handful of bench prototypes and debugging them in the lab no longer suffices. Power electronics system teams need access to efficient analysis on more development platforms, much earlier in the project. They also need the ability to inject faults and check safety features without damaging physical prototypes.

Simulation is the time-honored way to replace hardware with a software model. For power systems, as in many other electronics domains, SPICE has been widely adopted. It can model electronic behavior accurately before any actual hardware is available.  However, the nature of power electronics circuits can cause convergence issues for SPICE-like tools. In addition, SPICE analysis can be only as accurate as its circuit models, so the design engineer must have access to high-fidelity models for chips, discrete devices and interconnects such as printed circuit boards and cables. This makes sense in the later phases of development, when parts have been selected and accurate, validated models can be obtained from the component suppliers. However, at this stage any issues detected by SPICE require modifying the part list, obtaining new models, and rerunning simulations.

There is a clear need to perform analysis much earlier in the project timeline, but SPICE is not well suited to this purpose. Simulations using generic models provide limited value, and detailed circuit simulation is too slow for rapid investigation of design alternatives. Instead, system architects and designers have relied on “rule of thumb” analysis and added generous margins to reduce the chances of surprises from SPICE simulation later in the project. The only way to avoid inefficient development, unoptimized circuits and late-stage design iterations is to find an abstract simulation solution during the early development phases. Virtual prototyping has provided a solution for many types of electronics projects, and it is entirely applicable to the domain of power systems.

Virtual prototypes enable design teams to start development early and validate their design prior to part selection and physical implementation. The key to earlier simulation is the use of piecewise linear (PWL) circuit models rather than models with full SPICE-level accuracy. This approach approximates device characteristic curves with a series of line segments. PWL models simulate much faster than SPICE models and can be used early in a project, well before part selection. PWL models require less setup and enable the sort of what-if scenarios that bring high value during the proof of concept and high-level design phases. PWL and SPICE-level models are both valuable and it is critical that a virtual prototyping flow connects the two types of simulation seamlessly over the course of the project. This cannot be achieved using point tools; it requires an integrated solution.

The Saber family from Synopsys supports a complete, seamless power electronics virtual prototyping flow. Two members of this family—SaberEXP and SaberRD—provide complementary capabilities for different tasks and different phases in the development of power electronics systems. SaberEXP is a PWL circuit simulator for power electronics and mechatronic systems that includes a comprehensive high-abstraction model library. With these abstract models and minimal calibration parameters, SaberEXP is easier to use, more robust and faster than SPICE-like tools. SaberEXP is tuned for early design exploration and architectural what-if analysis. It provides parametric and statistical design capabilities to accelerate the optimization and verification of design robustness.

SaberRD is an intuitive, integrated environment for designing and analyzing power electronics systems. It performs all the types of analysis handled by traditional SPICE tools with equivalent or better accuracy and provides additional capabilities. Existing models in SPICE, C, Simulink, VHDL-AMS and the MAST analog hardware description language can be imported. Circuits and devices without models can be fully characterized within the environment. SaberRD simulates worst-case conditions and corner cases, while modeling faults and stress effects. It is ideal for verifying the design implementation, validating circuit parameters, optimizing the design, and performing reliability analysis.

SaberEXP and SaberRD fit together in a seamless development environment. SaberEXP designs can be easily imported into SaberRD allowing high-fidelity simulation, handling large systems and leveraging a rich feature set for robust design. SaberEXP and SaberRD are part of the Synopsys virtual prototyping spectrum including Silver and Virtualizer. They enable the comprehensive design, verification and validation of electronic systems, including software. To learn more, download this white paper.

Gobi Kengara Palayam Appavoo (K. A. Gobi) is an Application Engineering Manager for the Saber Product Line at Synopsys. He has a total work experience of more than 18 years and has been working for the Saber product line in Synopsys for more than 11 years. Prior to Synopsys, he worked in automotive companies such as Tata Motors, Volvo and General Motors and has experience in electrical system design & simulation verification methodologies. Gobi has a M.E degree from the National Institute of Technology-Tiruchirappalli in India.

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