Wafer-Scale Variability In Photonic Devices & Effects On Circuits


A technical paper titled “Capturing the Effects of Spatial Process Variations in Silicon Photonic Circuits” was published by researchers at Photonics Research Group, Ghent University−IMEC.

“We present in this paper a method to extract a granular map of the line width and thickness variation on a silicon photonics wafer. We propose a hierarchical model to separate the layout-dependent and location-dependent systematic process variation from the random process variation on different spatial levels,” states the paper.

Find the technical paper here. Published November 2022.

Capturing the Effects of Spatial Process Variations in Silicon Photonic Circuits
Yufei Xing, Jiaxing Dong, Umar Khan, and Wim Bogaerts
ACS Photonics Article ASAP
DOI: 10.1021/acsphotonics.2c01194.

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