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Next-Gen Transistors


Nanosheets, or more generally, gate-all-around FETs, mark the next big shift in transistor structures at the most advanced nodes. David Fried, vice president of computational products at Lam Research, talks with Semiconductor Engineering about the advantages of using these new transistor types, along with myriad challenges at future nodes, particularly in the area of metrology. » read more

Design Technology Co-Optimization


Rising complexity is making it increasingly difficult to optimize chips for yield and reliability. David Fried, vice president of computational products at Lam Research, examines the benefits of automated rules to manage the relationship between layout and design requirements on one side, and process flows and rules/checks on the other. Benefits include reduced margin, shortened time to market,... » read more

Improving Robustness And Minimizing Over-Pessimism In The Face of Rising Design Variability


Part 1 of this blog explored the problems facing designers working on Systems-on-a-Chip (SoCs) targeting energy-efficient design, and how Synopsys’ PrimeShield design robustness solution can help optimize designs for lower power while achieving aggressive time-to-market goals. This last part will delve into how the PrimeShield design robustness solution can help SoC designers optimize thei... » read more

Ins And Outs Of In-Circuit Monitoring


At 7nm and 5nm, in-circuit monitoring is becoming essential. Steve Crosher, CEO of Moortec, talks about the impact of rising complexity, how different use cases and implementations can affect reliability and uptime, and why measuring electrical, voltage and thermal stress can be used to statistically predict failures and improve reliability throughout a chip’s lifetime. » read more

Avoiding Gloom With Better Knowledge


The rate of product development is facing very real challenges as the pace of silicon technology evolution begins to slow. Today, we are squeezing the most out of transistor physics, which is essentially derived from 60-year-old CMOS technology. To maintain the pace of Moore’s law, it is predicted that in 2030 we will need transistors to be a sixth of their current size. Reducing transistor s... » read more

Process Control For Next-Generation Memories


The Internet of Things (IoT), Big Data and Artificial Intelligence (AI) are driving the need for higher speeds and more power-efficient computing. The industry is responding by bringing new memory technologies to the marketplace. Three new types of memory in particular—MRAM (magnetic random access memory), PCRAM (phase change RAM) and ReRAM (resistive RAM)—are emerging as leading candidat... » read more

Target: 50% Reduction In Memory Power


Memory consumes about 50% or more of the area and about 50% of the power of an SoC, and those percentages are likely to increase. The problem is that static random access memory (SRAM) has not scaled in accordance with Moore's Law, and that will not change. In addition, with many devices not chasing the latest node and with power becoming an increasing concern, the industry must find ways to... » read more

Adapt Or Fall Behind: Surviving And Thriving In The Competitive Jungle Of Plant Operations Scheduling And IIoT


Biopharmaceutical manufacturing has required significant technological developments in the area of cell culture, chromatography, and purification. It is no small miracle that every day across the world, millions of liters of cell culture capacity generates life-saving medicines for the patients who need it. The bio-manufacturing process is unique in its need for— Tight regulation of an i... » read more

Beyond Signoff


The future of connectivity is very promising - the new era of semiconductors will give rise to transformational products that will enable seamless connectivity with 5G, smarter devices with AI, next generation mobility with autonomous vehicles and immersive experiences with AR and VR. These cutting-edge electronics systems will require the use of advanced sub-16nm SoCs and complex packaging tec... » read more

The Implementation Of Embedded PVT Monitoring Subsystems In Today’s Cutting Edge Technologies


This new whitepaper from Moortec takes a comprehensive look at the Implementation of Embedded PVT Monitoring Subsystems in Today’s Cutting Edge Technologies and how this can benefit today’s advanced node semiconductor design engineers by improving the performance and reliability of SoC designs. With advances in CMOS technology, and the scaling of transistor channel lengths to nanometer (nm)... » read more

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