Week In Review: Design, Low Power

Quantum

The $3 million Breakthrough Prize in Fundamental Physics was awarded to four pioneers in the field of quantum information. The laureates are Charles H. Bennett, Gilles Brassard, David Deutsch and Peter Shor. Bennett and Brassard were part of the team that proved the usefulness of entanglement, while Deutsch defined the quantum version of a Turing machine. Shor invented the first “clearly useful” quantum computing algorithm.

Is there a quantum computing bubble? Industry insiders talk commercial viability, technical hurdles, and timeline predictions in this report.

Data Centers

The U.S. Department of Energy announced $42 million in funding for projects aimed at reducing data center energy usage for cooling. The program, nicknamed COOLERCHIPS, will prioritize four technical categories: efficient cooling for high power density servers, efficient high power density modular data centers, data center design and optimization tools, and facilities and best practices for evaluating and demonstrating the technologies developed in the program. The DOE said the funding is part of President Biden’s goal to reach net-zero carbon emissions economy-wide before 2050.

A Cadence blog discussed an interesting statistic: according to former Future Facilities CEO Hassan Moezzi and the 451 Global Digital Infrastructure Alliance, enterprise data centers use only 56% of their capacity.  “For every three data centers built in the world, with better utilization only two are really required, saving (gulp) $100 million,” said author Paul McLellan.

Tools and IP

Siemens collaborated with UMC on a new multi-chip 3D integrated circuit planning, assembly validation and parasitic extraction (PEX) workflow for UMC’s wafer-on-wafer and chip-on-wafer technologies. “As these customers continue to develop higher complexity designs, UMC and Siemens stand ready to deliver the advanced workflows that customers need to help bring these increasingly sophisticated designs to life,” said AJ Incorvaia, senior vice president of Electronic Board Systems at Siemens Digital Industries Software. Siemens also said it partnered with sustamize GmbH on adding carbon emissions data to Siemens Xcelerator.

Synopsys launched the ZeBu EP1 system, an emulation and prototyping system aimed at addressing verification requirements across the chip development cycle. “With Synopsys ZeBu EP1 system, industry-leading companies have achieved 19-MHz emulation and 100-MHz prototyping clock performance, enabling them to run large amounts of software pre-silicon and accelerate project schedules,” said Rohit Vora, senior vice president of R&D in the Systems Design Group at Synopsys. The company also released its latest edition of BSIMM, a report analyzing software security activities across more than 100 organizations. Synopsys found “significant increase in practices to bolster supply chain security.”

Keysight made three announcements over the past week. The company introduced a new arbitrary waveform generator with a sampling rate of 256 giga-samples per second. “Today’s applications and services generate vast amounts of artificial intelligence workloads in the data center. New electrical and optical designs are required to handle these workloads within reasonable bounds of energy consumption,” said Dr. Joachim Peerlings, vice president and general manager of Keysight’s Network and Data Center business. Keysight also said its new 224G ethernet test solutions allows SoC makers to validate next generation electrical interface technology, accelerating 1.6 terabit per second transceiver design and pathfinding. Additionally, the company revealed it delivered a compact battery test system for electric vehicles to Jiyun Technologies.

RISC-V

Codasip said it has joined OpenHW Group to contribute to standard development including formal verification. OpenHW is a non-profit organization focused on open source cores, IP, tools, and software. “In the strong and growing RISC-V community, everyone supporting the open standard benefits us all. We see the roles of open-source IP and commercial IP as complementary and though we sell our cores, we also see open source as a critical part of the ecosystem and for the success of RISC-V,” said Mike Eftimakis, Codasip VP Strategy and Ecosystem.

Funding

Movellus closed $23 million in Series B funding that will be used to expand research and development efforts and build out marketing and sales functions. Existing investors were joined by MESH and SK hynix. “We were able to close the round with a significant step up in valuation in a challenging economic environment, and SK hynix’s strategic investment is a strong endorsement in our technology and long-term strategy,” said Movellus CEO Mo Faisal.

Upcoming events

Sep. 25-30, International Test Conference, hybrid/ Disneyland, Anaheim, CA

Sep. 25-29, SPIE Photomask Technology and Extreme Ultraviolet Lithography, Monterey, CA

Sep. 27, GSA U.S. Executive Forum, Menlo Park, CA

Oct. 1-5, IEEE/ACM International Symposium on Microarchitecture, Chicago, IL

Oct. 3-6, International Symposium on Microelectronics – iMAPS, Boston, MA

Find more chip industry events here.

In case you missed it

Check out the Systems & Design newsletter and the Low Power – High Performance newsletter for these highlights and more:

• Strengthening The Global Semi Supply Chain
• Designing For Thermal
• Can ML Help Verification? Maybe
• Rethinking Machine Learning For Power

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