Week In Review: Design, Low Power

Tools and IP

Renesas introduced a new microprocessor that enables artificial intelligence to process image data from multiple cameras. “One of the challenges for embedded systems developers who want to implement machine learning is to keep up with the latest AI models that are constantly evolving,” said Shigeki Kato, Vice President of Renesas’ Enterprise Infrastructure Business Division. “With the new DRP-AI TVM tool, we are offering designers the option to expand AI frameworks and AI models that can be converted to executable formats, allowing them to bring the latest image recognition capabilities to embedded devices using new AI models.”

Renesas also said it will provide SoCs, microcontrollers, analog and power semiconductors, and technical support to Vietnam-based electric vehicle maker VinFast. And it launched an integrated software development environment for automotive ECUs containing multiple hardware devices. 

Siemens released Tessent multi-die software, which automates design-for-test tasks for 2.5D and 3D chip architectures. Ankur Gupta, vice president and general manager of the Tessent business unit for Siemens Digital Industries Software, said chip design companies are “seeing dramatic spikes in IC test complexity due to the rapid adoption and deployment of designs featuring densely packed dies in 2.5D and 3D devices.” The company also said recreational vehicle maker Hymer used Siemens software to create a digital twin for its new VisionVenture camper.

Synopsys developed a new streaming fabric technology that allows for real-time silicon health analytics in large and complex chip designs. The on-chip network also minimizes excessive power. “Efficient, cost-effective silicon data access is a fundamental requirement to achieving reliable device operation during their life cycles, which is essential for high uptime of mission-critical applications,” said Amit Sanghani, senior vice president of the Synopsys Hardware Analytics and Test team.

Keysight, AMD, and F5 collaborated on a demonstration of 5G Terabit scale traffic at the Mobile World Congress in Las Vegas. CyPerf, Keysight’s software-based cloud native traffic generator demonstrated performance capability of F5’s cloud-network network function, which in turn was powered by AMD processors. “With a proven method to generate and process cloud-based traffic, service providers can now confidently roll out 5G services at scale,” said Ram Periakaruppan, Vice President and General Manager of Keysight’s Network Solutions group.

Is the EDA industry doing enough to develop and drive new methodologies? Industry leaders say verification is indeed evolving, albeit slowly. Read more here.

Deals

IBM and Vodafone partnered with GSMA on a task force for post-quantum cryptography and adoption across the global telecommunications supply chain. The organizations say the goal of the task force is to “define policy, regulation and operator business processes for the enhanced protection of telecommunications in a future of advanced quantum computing.”

Renesas announced that AMD chose a Renesas timing device for its RFSoC DFE development platform. 

Research

A new study estimates the data center virtualization market will surpass $20 billion by 2030. Global Market Insights said the valuation will likely be driven by “the surging attention toward improving business agility and reducing operational cost, along with strong product penetration in government-associated sectors for easy accessibility of data.” Virtualization software helps to improve utilization of individual servers, and is a key part of the architecture in hyperscale data centers.

Imec researchers and Nokia Bell Labs jointly presented a key building block to deploy 100G PON (passive optical network).

Rockley Photonics has developed micro-transfer-printed (mTP) silicon-photonics based laser for commercial applications.

Once thought too futuristic, DNA is now edging forward as a data storage option.

Peking University presented an open-source dataset, named CircuitNet, dedicated to AI for IC applications.

Awards

Giovanni De Micheli, Professor and Director of the Institute of Electrical Engineering (IEL) and of the Integrated Systems Centre at the École Polytechnique Fédérale de Lausanne (EPFL) in Lausanne, Switzerland is this year’s winner of the Phil Kaufman Award for his contributions to EDA.

Upcoming events

Oct. 1-5, IEEE/ACM International Symposium on Microarchitecture, Chicago, IL

Oct. 3-6, International Symposium on Microelectronics – iMAPS, Boston, MA

Oct. 3-21, Samsung Foundry Forum & SAFE Forum, San Jose, EMEA, Japan, Korea, China

Oct. 19-21, Electronic Specialty Gas Conference, Chandler, AZ

Oct. 20-11, IEEE ISICAS: International Symposium on Integrated Circuits, Bordeaux, France

Oct. 24-28, Hardwear.io Security Trainings and Conference, The Hague, Netherlands

Oct. 25-27, PAINE: Physical Assurance & Inspection of Electronics, Huntsville, AL

Oct. 26-27, Arm DevSummit, San Francisco, CA   

Find more chip industry events here.

In case you missed it

Check out the Systems & Design newsletter and the Low Power – High Performance newsletter for these highlights and more:

• Strengthening The Global Semi Supply Chain
• Designing For Thermal
• Can ML Help Verification? Maybe
• Rethinking Machine Learning For Power

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