Design closure automation; DARPA’s reconfigurable signal processing project; Alphawave IP buys DSP maker; simulation for space.
Cadence unveiled a new environment to automate and accelerate the complete design closure cycle from signoff optimization through routing, static timing analysis (STA), and extraction. The Certus Closure Solution allows concurrent, full-chip optimization through a massively parallel and distributed architecture and engine shared with Cadence’s Innovus Implementation System and the Tempus Timing Signoff Solution. MaxLinear and Renesas noted adopting the new tool.
DARPA launched a new program, called Processor Reconfiguration for Wideband Sensor Systems (PROWESS), that aims to develop high-throughput, streaming-data processors that reconfigure in real time to detect and characterize novel signals. The program will develop processors that self-reconfigure within 50 nanoseconds to enable “just-in-time” synthesis of processing pipelines in uncertain environments. DARPA said that PROWESS will allow future receivers to optimize performance to both measured spectrum conditions and the needs of cognitive RF decision logic.
Alphawave IP acquired Banias Labs, an optical digital signal processing (DSP) chip developer for data centers, for approximately $240 million. “This acquisition aligns with the strategic priorities that we articulated at our IPO, expanding our technology portfolio in high-speed connectivity to support long-term growth. Coherent optics will enable the next level of efficiencies in data center communications, addressing the increasing bandwidth and power efficiency requirements,” said John Lofton Holt, executive chairman of Alphawave.
EnOcean acquired the assets of Renesas’ edge computing solutions business. “Our combined solution, including the SmartServer IoT and IoT Access Protocol (IAP) software, enables customers to leverage existing data that is already being generated in their buildings, machines, or other devices for a wide range of applications. This data can be augmented by additional energy harvesting and traditional sensors as needed to provide a comprehensive view,” said EnOcean CEO Raoul Wijgergangs.
Keysight introduced 400G ready network packet brokers for enterprises and service providers. It offers high-speed and scalable rack and edge traffic aggregation with a variety of port configurations and advanced tunneling, IP header filtering, load balancing, and timestamping features, as well as capabilities to address core network security monitoring environments. Keysight also released the latest version of its PathWave System Design (SystemVue) 2023 software to speed the design process for 5G non-terrestrial networks (NTN) and other wireless systems. Included in the update is the ability to create digital twins of radio frequency (RF) architectures and transform from a hardware-centric to a simulation-centric design flow.
Cadence teamed up with Google Cloud to provide cloud-ready tools certified for use with Google Cloud. The companies said that Cadence tools have been tested and benchmarked with performance improvements of up to 25% on Google Cloud C2D instances compared with an on-prem infrastructure.
Microamp Solutions selected Keysight Open Radio Architect (KORA) solutions to verify compliance with O-RAN specifications and ensure interoperability between the company’s plug-and-play O-RAN radio unit (O-RU) and other network elements.
Ansys will acquire Cullimore and Ring Technologies, also known as C&R Technologies, a provider of orbital thermal analysis. C&R’s software enables system-level simulation of thermal and fluid analysis of space applications and satellites and can be used in combination with Ansys physics solvers. “Beyond complementing Ansys’ portfolio with our thermal simulations focused on thermal-centric modeling and system-level analysis for design and optimization, C&R Technologies is also committed to providing engineers and researchers with an open platform for maximum flexibility and software customization,” said Brent Cullimore, president at C&R Technologies.
Siemens Digital Industries Software released the latest version of its Solid Edge software for product design, engineering, and manufacturing. Updates to the geometry definition tools in Solid Edge include synchronous technology applied to traditional ordered history-based parts and parts created using convergent modeling can be used in simulations without the need for additional conversion. Other updates include improved modeling workflows and automatic identification of manufacturing characteristics.
The European High Performance Computing Joint Undertaking (EuroHPC JU) selected six sites across the European Union to host and operate the first EuroHPC quantum computers: Czechia, Germany, Spain, France, Italy, and Poland. The proposals selected aim to provide a diversity of quantum technologies and architectures and be available to a wide range of European users in scientific communities, industry, and the public sector. More details of each proposal are available from the press release.
Find out why new memory approaches and challenges in scaling CMOS point to radical changes in semiconductor designs in the latest Low Power-High Performance newsletter. Also featured is why making the right decisions about the clock network architecture have such a big impact on power, performance, and timing, as well as the challenge of neat in near-memory compute architectures.
And in the latest Systems & Design newsletter, the narrowing focus of OEMs leads to IC architecture shifts; the potential of domain-specific EDA; why robust partnerships and multi-party innovation will be essential to manage complexity and cost; struggles in using machine learning to improve the functional verification; and the latest progress in quantum computing.
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