Week In Review: Design, Low Power

Arm planning IPO this year; ESD modeling; CBRAM; intelligent power electronics; Infineon uncorks ULP digital MEMS mic; Ansys, Microsoft deepen relationship.


Arm is heading for an IPO this year, with plans “fairly well developed and underway now,” CEO Rene Haas told Reuters. Arm reported fiscal Q3 revenue of $746 million, up 28% compared with the same period in 2021, setting the stage for a public offering. The company noted it had double- or triple-revenue increases in automotive, consumer, infrastructure, and IoT.

The Si2 Compact Model Coalition released the ASM-ESD diode model, a new electrostatic discharge compact modeling standard that aims to improve the reliability of integrated circuits. “Accurate SPICE simulation of electrostatic discharge scenarios and circuit protection is crucial to avoid ESD failures in integrated circuits and products,” said Sourabh Khandelwal of Macquarie University in Sydney. “ESD protection and core circuit co-design are increasingly important in advanced ICs, but conventional diode models do not account for ESD event regimes, during which the device operates under significantly different voltage, current, and thermal conditions. The Advanced SPICE Model for ESD Diodes captures diode behavior under ESD event conditions.”

Despite the current memory market downturn, Yole Group expects the total DRAM module market to reach about $96.3 billion in 2028, with a 16% CAGR between 2022 and 2028. It expects that growth to be largely driven by servers, a market the firm estimated saw a modest year-over-year growth in 2022, while PC modules saw a -36% YoY decline.

HBM3 remains costly, in part because of the price of the memory itself, and in part because of the cost of other components such as silicon interposers and the engineering required to develop a 2.5D design. That has limited its use to the highest-volume designs, or price-insensitive applications such as servers in data center, where the cost of the memory can be offset with improved performance due to more and wider lanes for data, and less power required to drive signals back and forth between processing elements and DRAM. So how do you decide between HBM, GDDR6, or LPDDR6?

Infineon Technologies registered its QDPAK and DDPAK top-side cooling (TSC) packages for high-voltage MOSFETs as a JEDEC standard. “Package outline standardization will help ease one of the main design concerns of OEMs for high-voltage applications by securing pin-to-pin compatibility across vendors,” said Ralf Otremba, lead principal engineer for high voltage packaging, Infineon.

The U.S. government is considering restricting U.S. investment into Chinese advanced technology companies, according to a report from the New York Times. Quantum computers, advanced semiconductors, and AI could be among those restricted. U.S. investors participated in 17% of global investment transactions into Chinese AI companies, according to a recent report from Georgetown’s Center for Security and Emerging Technology. Chinese startups accounted for over 60% of the companies tracked in the January startup funding report and throughout 2022.

Tools, products & deals

GlobalFoundries acquired Renesas Electronics‘ Conductive Bridging Random Access Memory (CBRAM) technology. CBRAM is a non-volatile, low-power memory designed for range of applications in home and industrial IoT as well as smart mobile devices. CBRAM is currently being qualified on the company’s 22FDX platform, with plans to extend it to other platforms.

Infineon Technologies added a new ultra-low power digital MEMS microphone with a signal-to-noise ratio of 69 dB(A), low microphone self-noise, and current consumption of 520 μA. It targets low-power applications such as TWS earbuds, overear headsets, hearing aids, and wearables.

Ansys and Microsoft are expanding their collaboration for using Ansys tools on Microsoft Azure. It will provide an alternative to the current managed cloud offering that enables customers to use their existing Ansys applications along with Azure services purchased directly from Microsoft for cost-savings, improved data management, and flexibility. Ansys will also expand its go-to-market strategy with Microsoft, including digital twins connected to the IoT, autonomous driving and flying systems development, and the use of simulation data to train AI/ML systems.

Power consumption has been a major design consideration for some time, but it is far from being a solved issue. In fact, an increasing number of designs have a plethora of power-related problems, and those problems are getting worse in new chip designs.

MISIC Microelectronics selected Keysight Technologies S930705B Modulation Distortion solution to enable active-device modulation distortion characterization of the company’s microwave devices and components without test system interference.

STMicroelectronics and SK Hynix adopted Synopsys’ design space exploration platform that uses reinforcement learning to enhance PPA in very large solution spaces.

Renesas Electronics used Cadence’s Xcelium Machine Learning App to optimize simulation regressions and said it saved 66% of its complete random verification regression cycle. Renesas also evaluated the Verisium AI-Driven Verification Platform.

Research notes

Researchers at the Singapore University of Technology and Design propose a new reconfigurable shift register-in-memory architecture for devices that can work both as a reconfigurable memory component and as a programmable shift register. “When operating as a memory, the device can be switched from the disordered glass state to crystalline state with 1.9 ns pulses, which is about one-third shorter than those of existing devices with germanium antimony telluride layers doped with nitrogen; and exhibit a resetting energy of 2 pJ. When operating as a shift register, the device can be switched between the serial-in–serial-out mode to serial-in–parallel-out mode, with a single cell, and exhibit many resistance levels, which has not been shown before,” said Desmond Loke, an assistant professor at SUTD.

Researchers from the University of Sussex and Universal Quantum have demonstrated that qubits can directly transfer between quantum computer microchips using electric field links. In tests, they were able to transport the qubits with a 99.999993% success rate and a connection rate of 2424/s. “As quantum computers grow, we will eventually be constrained by the size of the microchip, which limits the number of quantum bits such a chip can accommodate,” said Winfried Hensinger, professor of quantum technologies at the University of Sussex and chief scientist and co-founder at Universal Quantum. “In demonstrating that we can connect two quantum computing chips – a bit like a jigsaw puzzle – and, crucially, that it works so well, we unlock the potential to scale-up by connecting hundreds or even thousands of quantum computing microchips.”

The PowerizeD research program launched to develop intelligent power electronics with the aim of increasing the efficiency of power devices and systems with loss reduction up to 25%. “PowerizeD is to increase the degree of mechanical and electrical integration of control, driver and switching functionalities in components and to advance the integrated optimization of all power switch functionalities, independent of the semiconductor material used. New switching topologies and advanced control strategies involving the application of artificial intelligence are to improve efficient, robust and reliable operations even further,” a statement released by Infineon read. The European Union will contribute about €18M (~$19M) to the program, matched by national governments.

Keysight Technologies is participating in four projects that are a part of the European Union’s 6G Smart Networks and Services Joint Undertaking (SNS-JU) program. The projects involve combine digital and physical nodes to validate new technologies and research for 6G; user-centric 6G networks based on air-interfaces; a programmable end-to-end beyond 5G platform; and short range extreme communications.

People & education

SEMI introduced an online platform aimed at training and upskilling employees. The platform has courses such as front-end and back-end manufacturing operations, principles of chip design, and workplace safety, as well as AI, MEMS, and optoelectronics.

The National Academy of Engineering elected new members, including Cadence president and CEO Anirudh Devgan for technical and business leadership in the EDA industry. Other new members include Intel CEO Pat Gelsinger and TSMC VP of R&D Douglas Yu.

Nominations are now being accepted for the 2023 Marie R. Pistilli Electronic Design Award. The award  honors a person in the semiconductor-related industry or academia for his or her support and advancement of women in the related industries.

Upcoming events

  • International Symposium on Field-Programmable Gate Arrays: February 12 – February 14 in Monterey, CA
  • 2023 International Solid-State Circuits Conference (ISSCC 2023): February 19 – February 23 in San Francisco, CA
  • Phil Kaufman Award & Banquet: February 23 in San Jose, CA
  • HPCA 2023: IEEE International Symposium on High-Performance Computer Architecture: February 25 – March 1 in Montreal, QC, Canada
  • Large-area, Organic and Printed Electronics Convention (LOPEC): February 28 – March 2 in Munich, Germany
  • DVCon U.S. 2023: February 27 – March 2, in San Jose, CA
  • Infineon’s Wide-Bandgap Developer Forum: March 9, Online
  • Embedded World 2023: March 14 – March 16 in Nuremberg, Germany
  • International Symposium on Physical Design (ISPD): March 26 – March 29, Online
  • Tiny ML Summit 2023: March 27 – March 29 in Burlingame, CA
  • MEMCon 2023: Next Gen Datacenters, Memory Innovation & CXL: March 28 – March 29 in Mountain View, CA
  • SNUG Silicon Valley: March 29 – March 30 in Santa Clara, CA

Check out the events page for more.

Further reading

Check out the latest Low Power-High Performance and Systems & Design newsletters for these highlights and more:

  • Is RISC-V Ready For Supercomputing?
  • Disaggregating And Extending Operating Systems
  • Chiplets Taking Root As Silicon-Proven Hard IP
  • Power Issues Causing More Respins At 7nm And Below
  • CXL Picks Up Steam In Data Centers
  • Selecting The Right RISC-V Core

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