Low Power: Coming To A CE Device Near You

By Pallab Chatterjee Low power and connectivity are the two pervasive design constraints for chips and systems being designed today, and they are showing up in devices that have not had architectural changes in decades. Some of the changes are customer-driven, some are consortia-driven, and international cooperation is making some of the regulatory-driven. The regulatory side is moving slow... » read more

System Models Are Changing

By Pallab Chatterjee Historically system-level modeling was based on making sure there were no timing crashes on the main data bus. After that it was multi-core conflict resolution, distributed memory routing and, most recently, verifying the correct core actually has access to the correct memory with the data that is relevant being available. All of these areas are now subject to an additi... » read more