The Latest Power Management Techniques For Wearable Devices

A look at the challenges in architecting these surprisingly complex systems.


Wearable devices are popping up everywhere — across all markets.

In part one of this wearables white paper series, I wrote about the market and technical factors driving the development and adoption of wearable devices. In part two, we roll up our sleeves and address one of the key requirements for wearable devices.

Ah yes, power management.

You don’t need super powers to see the benefits of power management.

The need for optimized power management is obvious. Wearable devices are typically powered by a rechargeable battery or a single-use disposable battery. In either case, the user of the wearable device does not want the hassle of frequently plugging into a charger or replacing the battery. To minimize this problem, a wearable needs to optimize the usage of power across its various operating modes — sipping from the battery when the device is in standby mode, to maximizing the performance (and power consumption) only when needed. These power characteristics and resulting “battery life” statements become a key selection criterion when customers evaluate the usefulness (and worthiness) of a wearable device.

Embedded developers face numerous challenges when architecting a system that must meet stringent power usage constraints. First, developers have to pick a processor that can address the power/performance required by the wearable device. Once the processor is selected, developers design the board that can fulfill the specific requirements, including memory, I/O, graphics, display, etc. But that’s only the beginning. Once the hardware’s been architected, developers then need to architect and build a software infrastructure that can fully leverage the underlying hardware.

Wearables designs are becoming surprisingly complex. In fact, many of today’s wearables require the use of multicore processors, and increasingly heterogeneous multicore processors, which combine a microcontroller-class core for low-power functions and one or more application-class cores for the feature-rich functions. The development challenge here is clear. Developers need to design and develop capabilities for: booting multiple operating environments; Inter-Process Communication (IPC) across cores; dynamically loading and unloading operating systems and applications; scaling an operating system to fit on a microcontroller; and controlling the power states of the various cores. Developers are discovering that solving for this complex problem is not so simple.

Many of these issues and subsequent solutions are discussed in my current white paper, “Developing Effective Design Strategies for Today’s Wearable Devices: Power Management.” I urge you take to a look. My third and final paper of the series will be on security. As wearables become more connected the issue of security cannot be stressed enough.

But for now, let’s focus on optimizing our power management