Author's Latest Posts


Power Management Verification Requires Holistic Approach


Semiconductor Engineering sat down to discuss power management [getkc id="10" kc_name="Verification"] issues with Arvind Shanmugavel, senior director, applications engineering at [getentity id="22021" e_name="Ansys-Apache"]; Guillaume Boillet, technical marketing manager at [getentity id="22026" e_name="Atrenta"]; Adam Sherer, verification product management director at [getentity id="22032" e_... » read more

System Bits: May 12


Optomechanical tuning A new method developed by Rice University researchers for tuning the light induced vibrations of nanoparticles through slight alterations to the surface to which the particles are attached could open doors for new applications of photonics from molecular sensing to wireless communications. The researchers at Rice’s Laboratory for Nanophotonics (LANP) collaborated wit... » read more

Overtaking The Black Hatters


I think the question on many minds today is whether the security features in hardware and software included in electronic systems today will be enough to keep the hackers out. The threats are real, the impact on businesses and personal lives is painful. Thankfully, it is clearly evident that there is an impressive upswell of activity in the security realm happening everywhere - from academic re... » read more

System Bits: May 5


Fight counterfeiting with fingerprint chips Given that no two human fingerprints are exactly alike, an MIT spinout uses random variations in silicon chips as authentication identifiers for consumer products. Silicon chips are similar as manufacturing processes cause microscopic variations in chips that are unpredictable, permanent, and effectively impossible to clone. MIT spinout Verayo ... » read more

System Bits: April 28


Transistor encasing for better device performance ECE Illinois researchers have discovered a more effective method for closing gaps in atomically small wires. Led by Professor Joseph W. Lyding and graduate student Jae Won Do, the team reported this new transistor technology comprised of carbon nanotube wires shows promise in replacing silicon because it can operate 10 times as fast and is ... » read more

What Not To Verify


It is well understood that [getkc id="10" kc_name="verification"] is all about mitigating and managing risk, and success here begins with a good verification planning process. During the planning process, the project team creates a list of specific design functions and use cases that must be verified—and they identify the technique used to verify each specific item on the list. That list c... » read more

Blurring The Lines On Prototyping


Prototyping is an integral part of every [getkc id="81" kc_name="SoC"] today, with two main approaches being used: virtual or software-based, and physical, which includes FPGA-based boards as well as hardware emulation systems. [getkc id="104" kc_name="Virtual prototyping"] is typically used for software development in the early stages of SoC design, even before SoC [getkc id="49" kc_name="R... » read more

System Bits: April 14


Antennas on a chip In what is being called the missing piece of the puzzle of electromagnetic theory, a team of researchers at the University of Cambridge have figured out one of the mysteries of electromagnetism, that they believe could allow the design of antennas small enough to be integrated into a chip. These ultra-small antennas – the so-called ‘last frontier’ of semiconductor desi... » read more

UPF 3.0 Moves Toward Ratification


[gettech id="31044" t_name="UPF"] (Unified Power Format) 3.0 — the fourth incarnation in 10 years — is moving closer to the IEEE ballot process. Erich Marschner, verification architect at [getentity id="22017" e_name="Mentor Graphics"] and vice chair of the [gettech id="31043" comment="IEEE 1801"] working group, explained the working group is as close as possible to being on schedule for... » read more

Fighting Dark Silicon With Specialized Hardware


Looking at an SoC design from an architecture viewpoint, I’m hearing more discussion lately about the option of offloading tasks to specialized hardware. Especially where dark silicon is concerned, rather than having four or eight ARM processors — all with the same complexity — or cores like graphics processors, if you cannot use them all at full performance and they have to be shut o... » read more

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