Author's Latest Posts


Photoresist Problems Ahead


As the semiconductor industry begins its ramp to manufacturing at 10nm and below, activity is heating up involving lithography modeling. The goal is to be ready when all the pieces of the puzzle are in place. That includes [gettech id="31045" comment="EUV"], when it finally becomes commercially viable, as well as extending ArF [getkc id="80" comment="lithography"]. When it comes to lithogra... » read more

System Bits: Nov. 11


How transistors operate at absolute zero Research led by scientists at Chalmers University of Technology in Sweden and Caltech in California have demonstrated how noise in a microwave amplifier is limited by self-heating at very low temperatures, which is expected to be of importance for future discoveries in such as quantum computers and radio astronomy. The team also included researchers ... » read more

Power/Performance Bits: Nov. 11


Storing solar energy Engineers at Stanford have designed a catalyst that could help produce vast quantities of pure hydrogen through electrolysis – the process of passing electricity through water to break hydrogen loose from oxygen in H2O. Pure hydrogen (H2) is a major commodity chemical that is generally derived from natural gas. Tens of millions of tons of hydrogen are produced each ye... » read more

Boosting Battery Life In IoT Devices


Honing in on a sweet spot for an IoT application can be very tricky, especially when it comes to a battery-based one. However, the Paper Battery Co. is working to do just that. With technology based on a, you guessed it, a paper battery, the company’s CEO Shreefal Mehta said the company believes the concept of having power that was able to go into spaces that today the batteries and rigid ... » read more

What’s Working For Power Verification


Getting power verification right — or at least good enough — is the source of frustration for many design teams. Add to this the fact that there is no one right way to accomplish it just compounds the challenge. Fortunately, there are a number of options that are working to varying degrees, starting with static verification, according to Bernard Murphy, CTO of Atrenta. “Static verifica... » read more

Another Tool In The Bag


Clocks can account for 25% to 40% of total dynamic power consumption in a complex chip, so when looking for areas to reduce power, the clock tree network is a good place to start. Structurally, it is certainly possible to have single-bit flip flops with a clock that connects to every one of the flip flops, and the power in general is proportional to the number of buffers in the clock tree on... » read more

Design For Always-On


Designing for low power is such an interesting area because, while it might be frustrating, one size — or approach, in this case — does not fit all. It is a balancing act to weigh the design objectives against what is possible in the process. NXP, which launched a series of low power MCUs today aimed at the sensor-processing market, has been focusing on optimizing power consumption f... » read more

Power/Performance Bits: Nov. 4


Leveraging error-prone chips MIT researchers reminded that as transistors get smaller, they also grow less reliable, and that while increasing the operating voltage can help, there is a corresponding increase in power consumption. As such, some researchers and hardware manufacturers are exploring the possibility of letting chips botch the occasional computation. The team has devised a system t... » read more

System Bits: Nov. 4


Turning loss to gain By reexamining longstanding beliefs about the physics of lasers, Princeton University engineers have shown that by carefully restricting the delivery of power to certain areas within a laser could boost its output by many orders of magnitude. The team believes this finding could enable more sensitive and energy-efficient lasers, as well as potentially more control over ... » read more

Filling In The Gaps For Mixed-Signal Verification


Semiconductor Engineering sat down to discuss mixed-signal verification with Haiko Morgenstern, Mixed-Signal Verification Group Staff Engineer at Infineon; Dr. Gernot Koch, CAD Manager at Micronas; Pierluigi Daglio, AMS Design Verification Flows Manager at STMicroelectronics; and Helene Thibieroz, AMS marketing manager at [getentity id="22035" comment="Synopsys"]. What follows are excerpts of t... » read more

← Older posts Newer posts →