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Brian Bailey

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Brian Bailey is Technology Editor/EDA for Semiconductor Engineering.

Author's Latest Posts

Near-Threshold Computing
By Brian Bailey - 16 Jun, 2016 - Comments: 2

The emergence of the Internet of Things (IoT) has brought a lot of attention to the need for extremely low-power design, and this in turn has increased the pressure for voltage reduction. In the past, each new process node shrunk the feature size and lowered the nominal operating voltage. This resulted in a drop in power consumption. However, the situation changed at about 90nm in two ways. ... » read more

System-Level Verification Tackles New Role
By Brian Bailey - 15 Jun, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss advances in system-level verification with Larry Melling, product management director for the system verification group of [getentity id="22032" e_name="Cadence"]; Larry Lapides, vice president of sales for [getentity id="22036" e_name="Imperas”] and Jean-Marie Brunet, director of marketing for the emulation division of [getentity id="22017" e_nam... » read more

Menta Embeds FPGA Programmability
By Brian Bailey - 14 Jun, 2016 - Comments: 0

What constitutes a startup can be a matter of the market segment you are going after and the type of product that you are building. Within [getkc id="7" kc_name="EDA"], we often think of the lifetime of a company being just a few years between when an opportunity is identified, to a product being built and getting the first few customers and then getting gobbled up by one of the big three. But ... » read more

DAC Day Four: Excitement And Risk
By Brian Bailey - 09 Jun, 2016 - Comments: 0

One thing that was new to DAC this year, was an art exhibit. These were pieces of artwork related to our industry, such as chip plots, or more abstract ideas based on design data or analyses. They received many more entrants than their wildest dreams and had to choose a winner from over 80 pieces, but the grand prize was won by a 3D model of a finFET by David Freid of Coventor. This piece was ... » read more

System-Level Verification Tackles New Role
By Brian Bailey - 09 Jun, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss advances in system-level verification with Larry Melling, product management director for the system verification group of [getentity id="22032" e_name="Cadence"]; Larry Lapides, VP of sales for [getentity id="22036" e_name="Imperas”] and Jean-Marie Brunet, director of marketing for the emulation division of [getentity id="22017" e_name="Mentor Gr... » read more

DAC Day Three: UVM, Machine Learning And DFT Come Together
By Brian Bailey - 08 Jun, 2016 - Comments: 0

The industry and users have a love/hate relationship with UVM. It has quickly risen to become the most used verification methodology and yet at the same time it is seen as being overly complex, unwieldy and difficult to learn. The third day of DAC gets started with breakfast with Accellera to discuss UVM and what we can expect to see in the next 5 years. The discussion was led by Tom Alsop, pri... » read more

Formal Confusion
By Brian Bailey - 07 Jun, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss the right and wrong ways to apply formal verification technology with Normando Montecillo, associate technical director at [getentity id="22649" comment="Broadcom"]; Ashish Darbari, principal engineer at [getentity id="22709" e_name="Imagination Technologies"]; Roger Sabbagh, principal engineer at Huawei; and Stuart Hoad, lead engineer at PMC Sierra... » read more

DAC Day Two: Down To Business
By Brian Bailey - 07 Jun, 2016 - Comments: 0

DAC day two started with a breakfast presentation put on by Synopsys which included guests from ARM, TSMC and HiSilicon. It was titled Collaborating to Enable Design with the latest processors and finFET processes. Collaboration is a word that we hear increasingly when talking about the advanced nodes and today we are truly at the point where one company cannot do it all. Ron Moore, VP of ma... » read more

DAC Day One: EDA Through Different Glasses
By Brian Bailey - 06 Jun, 2016 - Comments: 1

DAC is back in Austin after being away for three years. The weather improved for our arrival after the bad thunderstorms of the past couple of weeks. The sun came out and started to heat everything up. With water still pooling around the place, it was somewhat humorous to see a bus pass with the slogan "Think about Austin without water." DAC starts, as it always has in my memory, with a pres... » read more

Valtrix Pushes For Horizontal Verification Reuse
By Brian Bailey - 01 Jun, 2016 - Comments: 0

Some of the most significant advances are not the result of a single person or a single idea. They often don’t happen overnight, and are suggested by a change that slowly becomes pervasive enough to become a generalized solution. That is exactly what is happening right now in the area of functional verification. The tools and methodologies in place at the moment assumed designs typical of the... » read more

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