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Brian Bailey

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Brian Bailey is Technology Editor/EDA for Semiconductor Engineering.

Author's Latest Posts

Time To Pay The Piper
By Brian Bailey - 28 Jul, 2016 - Comments: 3

The Pied Piper of Hamelin is a German fable about a rat catcher who used his magic pipe to lure away rats. When he was not paid by the town, he used his pipe to lure away all of the town's children. I am not suggesting that exactly the same is true for the semiconductor industry and having not paid [getkc id="7" kc_name="EDA"], but I do not think they have paid enough and they will now have to ... » read more

New Drivers For Test
By Brian Bailey - 28 Jul, 2016 - Comments: 0

Mention Design for Test (DFT) and scan chains come to mind, but there is much more to it than that—and the rules of the game are changing. New application areas such as automotive may breathe new life into built-in self-test (BIST) solutions, which could also be used for manufacturing test. So could DFT as we know it be a thing of the past? Or will it continue to have a role to play? Te... » read more

What’s Next For UVM?
By Brian Bailey - 28 Jul, 2016 - Comments: 0

The infrastructure for much of the chip verification being done today is looking dated and limited in scope. Design has migrated to new methodologies, standards and tools that are being introduced to deal with heterogeneous integration, more customization, and increased complexity. Verification methodologies started appearing soon after the release of SystemVerilog. Initially they were inten... » read more

Can Verification Meet In The Middle?
By Brian Bailey - 20 Jul, 2016 - Comments: 0

Semiconductor Engineering sat down to discuss these issues with; Stan Sokorac, senior principal design engineer for [getentity id="22186" comment="ARM"]; Frank Schirrmeister, senior group director for product marketing for the system development suite of [getentity id="22032" e_name="Cadence"]; Harry Foster, chief verification scientist at [getentity id="22017" e_name="Mentor Graphics"], Bernie... » read more

SoC Power Grid Challenges
By Brian Bailey - 14 Jul, 2016 - Comments: 7

The consumption of power and dissipation of heat within large SoCs has received a lot of attention recently, but that is only part of the issue. Power also has to be reliably delivered onto and around the system. This is becoming increasingly difficult, and new nodes are adding to the list of challenges. "If we were building chips where there was only a single Vdd and Vss then it is not that... » read more

No More Easy IP Money
By Brian Bailey - 14 Jul, 2016 - Comments: 2

The semiconductor intellectual property ([getkc id="43" kc_name="IP"]) industry is two decades old, but questions are still being asked about what's wrong with it and what needs to be fixed. Normally these kinds of issues are reserved for fast-moving, young industries, not one that is the backbone of semiconductors. Design reuse has become an indispensable part of the design of nearly all el... » read more

Abundant Change Ahead
By Brian Bailey - 06 Jul, 2016 - Comments: 1

There is nobody who would question the amazing ride that semiconductors have been on for the past 50 years. It has been described as the longest running exponential that humankind has ever been a part of—and it is not over yet. Still, the future is very likely to be substantially different from the past. It is almost natural for us to see a trend and assume it will continue. There have bee... » read more

Can Verification Meet In The Middle?
By Brian Bailey - 30 Jun, 2016 - Comments: 0

Since the dawn of time for the EDA industry, the classic V diagram has defined the primary design flow. On the left hand side of the V, the design is progressively refined and partitioned into smaller pieces. At the bottom of the V, verification takes over and as you travel up the right-hand side of the V, verification and integration happens until the entire design has been assembled and valid... » read more

Will Open-Source Work For Chips?
By Brian Bailey - 30 Jun, 2016 - Comments: 2

Open source is getting a second look by the semiconductor industry, driven by the high cost of design at complex nodes along with fragmentation in end markets, which increasingly means that one size or approach no longer fits all. The open source movement, as we know it today, started in the 1980s with the launch of the GNU project, which was about the time the electronic design automation (... » read more

Decoding The Brain
By Brian Bailey - 22 Jun, 2016 - Comments: 1

At the Design Automation Conference this year, Lou Scheffer, principal scientist for the Howard Hughes Medical Institute, gave a visionary talk entitled Learning from Life: Biologically Inspired Electronic Design. Scheffer is an IC design guy who came through Stanford and Caltech and worked for HP and [getentity id="22032" e_name="Cadence"] before switching to the medical field eight years a... » read more

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