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Hybrid Verification: The Only Way Forward


Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="10" kc_name=" functional verification"]. The inability of RTL [getkc id="11" kc_name="simulation"] to keep up with verification needs is causing rapid change in the industry. Taking part in the discussion are Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Janick Bergeron, fe... » read more

Tech Talk: Formal Practices


[getentity id="22147" comment="Oski Technology"] president and CEO [getperson id="11074" comment="Vigyan Singhal"] defines [getkc id="33" comment="formal verification"], where to start, and how and when to use it. [youtube vid=pxoSWtb4xIw] » read more

The Internet Of Cores


Ever since the birth of the third-party [getkc id="43" comment="IP"] market, there has been a desire for plug-and-play compatibility between cores. Part of the value proposition of reuse is that a block has been used before, and has been verified and validated by having been implemented in silicon. By re-using the core, many of these tasks no longer land on the [getkc id="81" kc_name="SoC"] dev... » read more

Hybrid Verification: The Only Way Forward


Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="10" kc_name=" functional verification"]. The inability of RTL [getkc id="11" kc_name="simulation"] to keep up with verification needs is causing rapid change in the industry. Taking part in the discussion are Harry Foster, chief scientist at [getentity id="22017" e_name="Mentor Graphics"]; Janick Bergeron, fe... » read more

Standard Time And The Day Of Two Noons


Many of you know that I have a kind of fascination with dates, times and the way they have changed over time. Everyone measured time by using the sun 150 years ago, and while this may not have been highly accurate – well, who cared? Farmers got up when the sun rose and did their stuff until the sun set. Most people had no need for time and the idea of a watch would have been..well…untimely.... » read more

Are Models Holding Back New Methodologies?


Semiconductor Engineering sat down to discuss the state of the industry for [getkc id="101" kc_name="modeling"] at abstractions above [getkc id="49" kc_name="RTL"], a factor which has delayed adoption of [getkc id="104" kn_name="virtual prototypes"] and the proliferation of system-level design and hardware/software codesign. Taking part in the discussion were Frank Schirrmeister, group director... » read more

Are More Processor Cores Better?


Up until the early 2000s, each generation of processor was faster, used more exotic architectures, had deeper pipelines, used more transistors, ran at higher clock frequencies and consumed more power. In fact power was rising faster than performance and led to the extrapolation that within a few generations, processors would run as hot as nuclear reactors. Something had to change, and that c... » read more

Keeping Up With The Productivity Challenge


Until recently, EDA software rode the coattails of increasing processor performance as part of its drive to continue providing faster and more powerful development software to the people designing, among other things, the next generation of faster processors. It was a fortuitous ring. Around the turn of the century, with the migration to multi-core computing systems, all of that changed. In ord... » read more

A Formally Free Lunch


I am sure many of you can remember the successful events staged by [getperson id="11679" p_name="Eric Hennenhofer"], founder and CEO of [getentity id="22813" comment="Obsidian Software"]. While neither his name nor that of his company may be on the tip of your tongue, DVClub might ring a few more bells. He started it so that he could have a place to meet fellow engineers while enjoying a free l... » read more

Tech Talk: Formal Verification


Praveen Tiwari, senior R&D manager for verification at Synopsys, talks with Semiconductor Engineering about when to use formal verification, why it isn't limited to small parts of the design, how to reduce complexity, bounded proofs, and bug hunting. [youtube vid=v8CoIAWU1XA] » read more

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