Author's Latest Posts


Coloring Optical Signals For More Bandwidth In Data Centers


Copper cabling has been the workhorse for moving data inside of AI and HPC data centers, but fiber is nipping at its heels. Optics brings three possible bandwidth multipliers — wavelength-division multiplexing (WDM), the use of different modes, and polarization. Each has a role in longer-distance optical links, but the tradeoffs are different in the data center. WDM appears poised to boost... » read more

Reticle Stitching Bumps Up Silicon Interposer Costs


Advanced packaging often relies on silicon interposers to connect chiplets and other components inside a package. The problem is that interposers typically exceed the reticle limit, which adds both complexity and cost. An interposer is essential for 2.5D and 3.5D architectures. As device scaling runs out of steam, chipmakers are decomposing planar SoCs into chiplets and connecting them throu... » read more

Will New Processor Architectures Raise Energy Efficiency?


Data centers continue to heat up as new processors consume more energy than ever before. Cooling is the primary weapon against the heat these processors generate, but it won’t be able to keep up forever with traditional processor architectures. New ones may be necessary. There are opportunities today to make well-known architectures more energy-efficient, but the number of options for subs... » read more

Can Cheaper Lasers Handle Short Distances?


Optical technology is well established for long-haul communications, but the distances it serves are shrinking — especially in the data center. Vertical-cavity surface-emitting lasers (VCSELs) already drive short fiber links. But efforts are underway to further scale them down to provide more connections through waveguides than fiber can provide. “We have seen the transition from long... » read more

On-Die And In-Package Interconnects: eBook


We live in the Information Age, but if information cannot get to where it's intended to go, it does no good. And the way information gets from here to there is through interconnects. This report focuses on different interconnect structures, such as lines, vias, buses, and networks-on-chip, and how they’re constructed. As always, we consider the design, test, reliability, and security impli... » read more

Can Today’s Processor Architectures Be More Efficient?


For years, processors focused on performance, and that performance had little accountability to anything else. Performance still matters, but now it must be accountable to power. If small gains in performance result in disproportionate power gains, designers may need to discard such improvements in favor of more power-efficient ones. Although current architectures undergo a steady cadence of... » read more

Physics Limits Interposer Line Lengths


Electrical interposers provide a convenient surface for mounting multiple chips within a single package, but even though interposer lines theoretically can be routed anywhere, insertion losses limit their practical length. Lines on interposers — and on silicon interposers in particular — can be exceedingly narrow. Having a small cross-section makes such lines resistive, degrading signals... » read more

The Best DRAMs For Artificial Intelligence


Artificial intelligence (AI) involves intense computing and tons of data. The computing may be performed by CPUs, GPUs, or dedicated accelerators, and while the data travels through DRAM on its way to the processor, the best DRAM type for this purpose depends on the type of system that is performing the training or inference. The memory challenge facing engineering teams today is how to keep... » read more

Cooling Chips Still A Top Challenge


Increasing levels of semiconductor integration means more work needs to be done in smaller spaces, which in turn generates more heat that needs to be dissipated. Managing heat dissipation in advanced node dies and in multi-die assemblies is critical to their functionality and their longevity. And while much of the focus has been on improving power efficiency, which reduces the rate of power ... » read more

Die-to-die Interconnect Standards In Flux


UCIe, a standard for die-to-die interconnect in advanced packages, has drawn concern about being too heavyweight with its 2.0 release. But the fact that many of the new features are optional seems to have been lost in much of the public discussion. In fact, new capabilities that support a possible future chiplet marketplace are not required for designs that don’t target that marketplace. ... » read more

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