Author's Latest Posts


Experts Panel And Tutorial At DVCon


Besides our usual exhibit at the Design and Verification Conference in Santa Clara at the end of next month, Real Intent has organized a panel and a half-day tutorial that highlights some of the changes happening in our industry—and which may have been overlooked. The panel addresses the interesting topic “Where Does Design End and Verification Begin?” The abstract states that design a... » read more

Clocks And Bugs


In late September, I blogged about the results of the 2012 DAC survey on CDC bugs, X propagation, and timing constraints by Real Intent. Now for those of you who don't remember what CDC means, it is an acronym for clock domain crossing. In modern SoCs, the number of different clock domains can easily exceed 100, due to the integration of different blocks and IP, each with their own clock. Not ... » read more

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