Author's Latest Posts


Blog Review: May 27


With the launch of UNICEF and ARM's 'Wearables for Good' design challenge, David Maidment digs into the program's details and how unobtrusive wearables and sensor technology benefits not only consumers in affluent countries, but could improve conditions for those in the developing world as well. From an ultracompact beamsplitter that could boost processing power for supercomputers within the... » read more

Power/Performance Bits: May 26


Woven fabric electrodes An international team including scientists from the University of Exeter pioneered a new technique to embed transparent, flexible graphene electrodes into fibers commonly associated with the textile industry. Exeter Professor Monica Craciun, co-author of the research said: "This is a pivotal point in the future of wearable electronic devices. The potential has been... » read more

The Week In Review: Design/IoT


Tools Cadence updated its Allegro PCB product line with a new manufacturing option that accelerates manufacturing documentation and technology updates for increased efficiency, control and productivity for designers and streamlining handoff to manufacturing. The release also allows users to develop custom fabrication and assembly rules. Invionics expanded its Invio EDA development platfor... » read more

Blog Review: May 20


FinFETs change the equation for power optimization, says Mentor's Vincent Lebars – and while companies are attacking some power gains, there is much more to be had doing datapath optimization within the place and route flow. Cadence's Richard Goering talks with Oz Levia about the future direction of formal and its integration into other product lines now that the merger between Cadence and... » read more

Power/Performance Bits: May 19


3D microbatteries for large-scale on-chip integration By combining 3D holographic lithography and 2D photolithography, researchers from the University of Illinois at Urbana-Champaign created a high-performance 3D microbattery suitable for large-scale on-chip integration with microelectronic devices. According to Paul Braun, professor of materials science and engineering at Illinois, "Micr... » read more

The Week In Review: Design/IoT


M&A Avago appears to be on the prowl for a new acquisition. According to a Reuters report, it has made inquiries at Xilinx, Renesas and Maxim and has more than $10B to spend. Avago made a bid for Freescale earlier this year, but NXP ended up buying Freescale for $11.8B. IP Sonics unveiled the ICE-Grain Power Architecture, a power management sub-system for mainstream SoC designs that c... » read more

Blog Review: May 13


From corralling graphene electrons to the wild west of space, this week's top five from Ansys' Bill Vandermark reaches from the tiny to the immense. This summer, an asteroid mining firm plans to deploy a satellite to seek out mineral-rich space rocks. But someday, when mining asteroids is a commonplace affair, it may be archeologists who are doing the digging on distant planets. Could a smar... » read more

Power/Performance Bits: May 12


Quantum teleportation on a chip Researchers at the University of Tokyo have successfully integrated the core circuits of quantum teleportation, which generate and detect quantum entanglement, into silica-optical-waveguide circuits on a silicon photonic chip measuring 0.0001 square meters. While there has been significant progress in current technology of information processing, its perfor... » read more

The Week In Review: Design/IoT


Embedded Mentor Graphics released a new version of their Nucleus RTOS with a focus on high-performance IoT and wearable applications. Updates include support for Dynamic Linking and Loading (DLL) capabilities in Cortex-M based cores; the ability for developers to reconfigure, update, and provision connected embedded devices that utilize cloud-based remote software services; and TI WiLink 8 m... » read more

Blog Review: May 6


How do you choose between bulk planar transistors, FinFETs, and FD-SOI? Cadence's Richard Goering got some answers during a session at the Electronic Design Process Symposium. Check out the Q&A in the second part, too. Synopsys' Michael Posner tackles a question about the differences between a prototyping bridge and hybrid prototypes and the limitations each has to solve various kinds of... » read more

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