Author's Latest Posts


Securing Next-Gen 5G And IoT With Defensics Fuzzing


Expansion of the IoT brings new security challenges The evolution of 5G technologies continues to drive advancement in Internet of Things (IoT) devices and their applications. By 2025, experts predict there will be nearly 4 billion IoT mobile connections in the world, and more than 64 billion IoT devices by 2026. In addition to enabling superior performance and efficiency, 5G expands the ... » read more

Jitter Budgeting For Clock Distribution Networks In High-Speed PHYs And SerDes


This paper presents a simple but practically precise estimation of periodic single-tone power supply induced jitter (PSIJ) for MOS clock buffer chains. The estimation is algebraically simple for its analytical closed-form expression requiring only a few circuit simulation results without the pre-knowledge of circuit device SPICE parameters. The expression is well suited to predict period PSIJ, ... » read more

Adding Differentiating Value And Reducing IP Integration Time for Your SoC


In the most efficient SoC design processes, semiconductor companies design their own, differentiated IP blocks, acquire high-quality third-party IP, configure it in an SoC-optimized way, and integrate all blocks into the SoC infrastructure of clocks, voltage supplies, on-chip buffer memories or registers, and test circuits. The SoC design team defines and drives the SoC-specific implementation ... » read more

Software Self-Test As A Safety Mechanism For Processing Units


The growing dependency of modern automobiles on electronic functions increases the need for a variety of integrated circuits (ICs) for safety-critical applications. Requirements coming from different in-car subsystems drives the need for chip manufacturers to create a wide range of specialized solutions. This, in turn, raises the bar for automotive IP suppliers and pushes them to offer configur... » read more

Radiation Tolerance Is Not Just For Rocket Scientists


As technology scales, soft errors from particle radiation are becoming increasingly concerning for in-field reliability. These radiation effects are called Single Event Upsets (SEU) and the frequency of the failures due to SEUs is known as the Soft Error Rate (SER). Soft errors are failures due to external sources. By contrast, hard errors refer to actual process manufacturing defects or electr... » read more

How Low Can You Go? Pushing The Limits Of Transistors


Rising demand for cutting-edge mobile, IoT, and wearable devices, along with high compute demands for AI and 5G/6G communications, has driven the need for lower power systems-on-chip (SoCs). This is not only a concern for a device’s power consumption when active (dynamic power), but also when the device is not active (leakage power). This highly competitive industry provides significant rewar... » read more

Modeling Silicon Photonics Process Parameter Variations In Synopsys OptoCompiler-OptSim


Silicon photonics (SiPh) refers to the enablement of photonic integrated circuits (PIC) over silicon wafer. SiPh enables compatibility with existing CMOS manufacturing infrastructure for large-scale integration and brings the associated benefits to the photonics, namely, lower footprint, lower thermal effects, and co-packaging of electronics and photonics on the same chip. One of the side-effec... » read more

Expansion Of The IoT Brings New Security Challenges


The evolution of 5G technologies continues to drive advancement in Internet of Things (IoT) devices and their applications. By 2025, experts predict there will be nearly 4 billion IoT mobile connections in the world, and more than 64 billion IoT devices by 2026. In addition to enabling superior performance and efficiency, 5G expands the attack surface of applications and devices that run on ... » read more

Faster And Smarter LVS For The SoC Era


Development of a modern system-on-chip (SoC) device is a long and incredibly complex process. Design teams rely on a huge range of tools, technologies, and methodologies to get the job done. Given the ongoing advances in silicon technology and design architecture, the tools are in a constant state of evolution. Logic-versus-schematic (LVS) checking is one of those tools. This is one of the earl... » read more

Silicon Lifecycle Management Platform


Silicon Lifecycle Management (SLM) is an emerging paradigm within the industry that is making product development and deployment more deterministic. In-silicon observability and insight are key when it comes to SLM and as an industry we can no longer afford to be blind to what is happening inside the chip. SLM is starting to close the loop between design and in-field. Click here to read more. » read more

← Older posts Newer posts →