Author's Latest Posts

Addressing Power Integrity Challenges For SoCs
By Synopsys - 11 Oct, 2017 - Comments: 0

Power integrity has become a crucial part of the system-on-a-chip (SoC) design flow because power-related issues can affect chip timing and even lead to complete device failure. Specifically, excessive rail voltage drop (IR-drop) and ground bounce can create timing problems and electromigration effects that impact a chip's performance and reliability. Analyzing a chip's power also poses diff... » read more

Developing High-Reliability Reprogrammable NVM IP for Automotive Application
By Synopsys - 04 Oct, 2017 - Comments: 0

To help IC designers understand the complexities in developing the highest reliability non-volatile memory (NVM) IP for automotive applications, this white paper will review key considerations from design to test, including: key reliability specifications, designing-in reliability, and demonstrating reliability through characterization, qualification, and reliability testing. This paper helps I... » read more

A Simple Way To Debug IIP-Based Designs And SoCs
By Synopsys - 27 Sep, 2017 - Comments: 0

Design problems that appear in the late phases of the development cycle can be extremely difficult to track down and debug, thus putting project schedules at risk. This whitepaper presents the concept of debugging with “real time simulation data” using Verdi Transaction Debug Platform (protocol analyzer, waveform viewer, source code browser) and show its benefits by taking a few generic USB... » read more

Functional Safety For FPGA-Based Hardware Designs
By Synopsys - 13 Sep, 2017 - Comments: 0

Advances in design and manufacturing technology allow increased factory automation, where tasks are automatically performed by sophisticated equipment such as industrial robots. Manufacturing processes require fail-safe mechanisms to prevent human injury or costly downtime. With increasing sophistication and automation of the manufacturing processes, there is increasing need for error detection... » read more

Fuzz Testing Maturity Model
By Synopsys - 23 Aug, 2017 - Comments: 0

Fuzz testing is a highly effective technique for locating vulnerabilities in software. Malformed and unexpected inputs are delivered to the target software, and when failures occur, vulnerabilities have been located. Fuzzing is a widely recognized technique for improving the security, robustness, and safety of software. However, fuzzing is an open-ended pursuit—an infinite space problem. So, ... » read more

Exploiting The Java Deserialization Vulnerability
By Synopsys - 09 Aug, 2017 - Comments: 0

In the security industry, we know that operating on untrusted inputs is a significant area of risk; and for penetration testers and attackers, a frequent source of high-impact issues. Serialization is no exception to this rule, and attacks against serialization schemes are innumerable. Unfortunately, developers enticed by the efficiency and ease of reflection-based and native serialization cont... » read more

Establish A Software Procurement Process To Manage Supply Chain Risk
By Synopsys - 26 Jul, 2017 - Comments: 0

Improving the procurement language in your software contracts is an effective way to convey requirements for built-in security. Too many examples of afterthought bolt-on security have put enterprises and users at risk due to exploitable software. Historically, there has been no shared liability associated with software because standard contracts have absolved software suppliers and outsource... » read more

The Basics Of Foundation IP For Automotive ICs
By Synopsys - 12 Jul, 2017 - Comments: 0

This white paper provides a broad overview of requirements that must be considered in order to design and manufacture integrated circuits (ICs) for the automotive sector. The paper looks specifically at the standards that apply to Foundation IP - logic libraries, embedded memories, and memory built-in self-test (BIST) - for different automotive IC functions and how reliability grades affect IP ... » read more

ARC HS4x And HS4xD CPUs
By Synopsys - 28 Jun, 2017 - Comments: 0

Synopsys’ DesignWare ARC CPUs comprise a family of highly configurable and customizable processor cores, which ship in nearly two billion chips per year. ARC’s popularity in embedded devices makes the company second only to ARM in the number of chips that integrate its licensable CPUs. More than 230 ARC licensees use the cores in products that span a broad range of embedded applications, su... » read more

Saving Power In A UFS Implementation Leveraging MIPI M-PHY And UniPro
By Synopsys - 07 Jun, 2017 - Comments: 0

The JEDEC Universal Flash Storage (UFS) has become the mobile storage standard of choice for today’s high-end smartphones and tablets mainly due to the specification’s performance and power advantages over other existing solutions. These advantages become critical to meet end users’ requirements for higher responsiveness and increased capabilities. For example, end users expect to transmi... » read more

← Older posts Newer posts →

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2026 SMG   |  Terms of Service  |  Privacy Policy