Blog Review: May 23

3D IC test; embedded tips; the state of RISC-V; CMP for scaling.


Cadence’s Paul McLellan digs into the problems of test for 3D ICs s well as new approaches to cell-aware test, modular test and realistic IR drop at CDNLive EMEA.

Mentor’s Colin Walls shares four more embedded software tips, including always initializing a variable and when to use ++i instead of i++.

Synopsys’ Taylor Armerding points to a new way that phishing attacks could get around Microsoft’s Office 365 security measures by breaking malicious links into two parts.

UltraSoC’s Rupert Baines considers the current state of RISC-V adoption, what it will take for it to become a commercial success and see industry-wide adoption, and one worrying trend.

Applied Materials’ Sameer Deshpande and Garlen Leung examine the crucial role of chemical mechanical planarization, or CMP, in device scaling and how it could help manage edge placement error.

SEMI’s Lara Chamness points out that the worldwide reclaim wafer market is set to surge this year, although reclaim suppliers face challenges in ever-tightening particle specifications, feedstock shortages, and yield management.

Arm’s René de Jong presents a tutorial on programming robots and robotic systems using the Gazebo robot simulator and ROS system control middleware.

GlobalFoundries’ Yafeng Zhang takes a look at which non-volatile memory solution is best for MCUs, embedded NVM or system-in-package, and the power consumption, power-up time, speed, security, reliability and cost comparisons for both.

Rambus’ Aharon Etengoff warns that there’s a wave of cryptocurrency heists as exchanges scramble to secure their platforms and notes that a lack of financial regulatory mechanisms means investors may have little legal recourse if their wallets go empty.

Nvidia’s Jamie Beckett checks out an effort at John Hopkins Hospital to make early detection of pancreatic cancer, which has the lowest five-year survival rate of any cancer, possible through deep learning.

And don’t miss the highlighted blogs, including from last week’s Manufacturing & Process Technology newsletter:

Editor In Chief Ed Sperling observes that pushing the laws of physics is becoming far too expensive for most chipmakers.

Executive Editor Mark LaPedus points to gaps in EUV mask inspection and pellicles.

KLA-Tencor’s Jeff Barnum examines the fundamental differences in finFET and FD-SOI architectures and materials.

IEEE’s Gary Dagastine focuses on a series of upcoming technical challenges for 5G.

SEMI’s Emir Demircan contends that when crafting regulations, care needs to be taken to avoid limiting the growth of important technologies.

Helic’s Magdy Abadir, Padelis Papadopoulos, and The American University in Cairo’s Yehea Ismail present a method for shrinking the size and power of designs, with less margin and fewer decaps.

Arm’s Antonio Priore points to ways to accelerate time to market for safety-critical designs.

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