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Blog Review: Nov. 27

Enabling wireless 3D integration; firmware and platform security; reducing DNN memory use.

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Arm’s Ben Fletcher digs into what’s needed to make wireless 3D integration a reality from a tool to automate the design and optimization process for inductors used in wireless 3D-ICs to exploring how the data can be encoded in the transceiver to reduce power consumption.

Cadence’s Paul McLellan listens in as Eli Singerman of Intel explains the importance of platform security and why firmware is a vital part of addressing hardware issues that have been identified in the recent past and new ones that are likely to appear in the future.

Mentor’s Elven Huang points to how pattern matching and similarity checking can improve the process of debugging large SRAM blocks at advanced nodes.

Synopsys’ Taylor Armerding considers several election security bills currently in the U.S. House and Senate and whether what they contain will really lead to more secure elections and tamper-proof voting machines, plus some of the roadblocks in the way.

A Rambus writer checks out a new paper from UC Berkeley researchers that takes a new approach to reducing memory use in deep neural networks to explore larger models, at larger batch sizes, on more complex signals with minimal computation overhead.

ANSYS’ Prith Banerjee provides an overview of 5G technology, what differentiates it from 4G, and the infrastructure changes that will be needed to deliver it for applications like automotive.

In a video, VLSI Research’s Dan Hutcheson chats with Aki Fujimura of D2S about curvilinear masks, the impact of deep learning on semiconductor manufacturing, and other mask/lithography trends.

Analyst Walt Custer finds that military and medical were the strongest electronics equipment markets in Q3 2019 while the automotive and instruments and control sectors contracted, and predicts an upturn after a challenging year.

Applied Materials’ Siobhan Kenney highlights a video series honoring innovators using technology to address critical problems and improve lives around the world.

Nvidia’s Geetika Gupta explains mixed-precision computing, how it’s different from multi-precision, and some of the ways it’s being applied to make scientific applications run even faster on advanced supercomputers.

For more reading, check out the blogs featured in the latest System-Level Design and Manufacturing, Packaging & Materials newsletters:

Editor In Chief Ed Sperling argues that chip architectures need to span time as well as space.

Technology Editor Brian Bailey sees little point in creating the best possible device if slightly better is good enough.

Synopsys’ Himanshu Bhatt explains the stages of a modern low-power development and verification flow.

Cadence’s Frank Schirrmeister contends that the importance of data is changing traditional value creation in electronics and forcing recalculations of return on investment.

Aldec’s Alex Gnusin makes the case for revealing finite state machine design bugs at the earliest stages of code development.

Mentor’s Abdellah Bakhali describes why integrating disparate I/O ring rules from various IPs creates a design with robust reliability.

Editor In Chief Ed Sperling observes that a flood of options and custom solutions is taking a toll on economies of scale.

Executive Editor Mark LaPedus questions whether RF GaN will be used in phones.

Lam Research’s Jiangtao Hu demonstrates how a new approach to semiconductor process monitoring promises to be simpler, less expensive, and less time-consuming than traditional approaches.

Applied Materials’ Ellie Yieh reminds us that different strategies and industry collaborations are needed to go beyond traditional Moore’s Law scaling and accelerate the rate of progress.

Coventor’s Benjamin Vincent compares variation among different process flows without fabricating test wafers.

SEMI’s Serena Brischetto explains how new microfluidic devices could work with advances in stem cell technology to create treatment tailored to individual patients.



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